Hmm,
http://www.cs.wright.edu/~phe/EGR199/Lab_3/fig4.gif
F1 = 0.16/ ( C1 * Rin) = 0.32Hz
F2 = 0.16 /( C3 * R5) = 1Hz
F3 = 0.16/ ( C4 * RLoad ) = 8.5Hz
So your cut-off frequencies is equal Fc = 8.5Hz
So I don't know what you want?
The two BJT, will typically provide a current gain between 500
and 10K. This means that 4Ω load resistance will look like a load resistance (connect parallel to R9) between 2KΩ and 40KΩ
http://en.wikipedia.org/wiki/Sziklai_pair
As for THD read this
http://www.ece.tamu.edu/~karsilay/ecen326/Lab_Reference_Manual.pdf
http://www.cs.wright.edu/~phe/EGR199/Lab_3/fig4.gif
F1 = 0.16/ ( C1 * Rin) = 0.32Hz
F2 = 0.16 /( C3 * R5) = 1Hz
F3 = 0.16/ ( C4 * RLoad ) = 8.5Hz
So your cut-off frequencies is equal Fc = 8.5Hz
So I don't know what you want?
To get more current gain. And we need that extra current gain, because we need isolate RL from the voltage amplifier stage (Q1).why do we use 2 stage power bjt
The two BJT, will typically provide a current gain between 500
and 10K. This means that 4Ω load resistance will look like a load resistance (connect parallel to R9) between 2KΩ and 40KΩ
http://en.wikipedia.org/wiki/Sziklai_pair
As for THD read this
http://www.ece.tamu.edu/~karsilay/ecen326/Lab_Reference_Manual.pdf