I have to implement a full adder circuit where I have two control inputs O1 and O0. When O1 and O0 are 0 0 it should add A+B (and it does). When O1 and O0 are 0 1 and 1 0 they have to add A-B and B-A respectively and when O1 and O0 are 1 1 it adds -A-B.
Using XOR, AND and NOT logic gates was able to implement a circuit that does the first three operations because it inverts only one number (A or B) however I can't make it add the -A-B or -(A+B) .

 

I have to implement a full adder circuit where I have two control inputs O1 and O0. When O1 and O0 are 0 0 it should add A+B (and it does). When O1 and O0 are 0 1 and 1 0 they have to add A-B and B-A respectively and when O1 and O0 are 1 1 it adds -A-B.
Using XOR, AND and NOT logic gates was able to implement a circuit that does the first three operations because it inverts only one number (A or B) however I can't make it add the -A-B or -(A+B) .

I can help you with your VHDL homework and VHDL project. My Instagram address: <snip>

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I can help you with your VHDL homework and VHDL project. My Instagram address: <snip>

Moderator edit: address deleted to avoid spam. If you wish to communicate address use PM.

We discourage people from doing other people's homework, especially if they have not shown any effort to solve their own problems. The mods are kind of picky on this point so tread carefully.

Also, how do you know it has anything to do with VHDL?