Hi.
I am making a digital clock for a project. It uses a 555 set at 1 Hz. The output from the timer is given to a 7493 which then send the signal a 7447 which drives a SSD. The issue here is that the timer starts from 2 after completing the loop (first loop always starts with 0). I tried simulating the circuit and it worked just fine but the breadboard implementation just doesn't seem to work. I am attaching the image of the circuit I need help with as I can't upload a proteus project file. Any kind of help will be appreciated.

 

You are using the wrong counter chips. You need to use a mix of 7490 and 7492.

7490 is a decade counter.
7492 is a divide by 2 and divide by 6 counter.

Use the 7490 followed by 7492 for 0-59 seconds and 0-59 minutes. No additional gates are needed to reset the counters.

 

Do you have decoupling capacitors as close as possible to each chip? TTL creates all kinds of spikes without them.
Can you see the display go through 0-1-2 quickly, of does it appear to go directly from 9 to 2?
Does this happen with all stages?
Can you post a larger, more readable image?
The wiring around U10 has some issues.
For U5 and U10, reposition the line from pin 11 so it is clearly visible under the chip decal.
The Reset inputs to U9 are floating.
U9 has no decoding feedback, and will cycle through 16 counts instead of 10.

ak

 

You are using the wrong counter chips.

It looks to me like the first two stages of the schematic as shown should cycle through 0-9 and 0-5, and repeat with no additional decoding gates. Good enough, only one chip type.

ak

 

I have not studied the reset decoding in the circuit shown.

There is a problem at U8:C pin-8 wired to U10 pin-12. You cannot connect outputs together.

 

Here is a cleaner version of the schematics.

Do you have decoupling capacitors as close as possible to each chip? TTL creates all kinds of spikes without them.
Can you see the display go through 0-1-2 quickly, of does it appear to go directly from 9 to 2?
Does this happen with all stages?
Can you post a larger, more readable image?
The wiring around U10 has some issues.
For U5 and U10, reposition the line from pin 11 so it is clearly visible under the chip decal.
The Reset inputs to U9 are floating.
U9 has no decoding feedback, and will cycle through 16 counts instead of 10.

ak

It just jumps from 9/5 to 2. There is no delay in between. And yes it happens with all the displays but only when I implement it on a breadboard. The simulation works fine.

 

Just wire up ... U3, U9 & U5 of your latest schematic and
get it Counting ... 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 RESET to 0 - First !

Then add each decade, and debug one at a time.

divide and conquer ...