I read this:

as you thinking he wants to create an output that is 1:11, while my read of his question is that he has an *input* that is 1:11, and he wants to create an output that is 12:12.

Did I misread?

ak

I thought the same as you.

It needs to toggle at the rising edge of an input that will be active high for 1 hour then active low for 11 hours

 

He wants to use the output from the FF as a AM/PM indicator. So every time the clock gets to 12:00 will be the trigger.
So the trigger will be High until 1:00 then Low for the next 11 hours.

 

I read this:

as you thinking he wants to create an output that is 1:11, while my read of his question is that he has an *input* that is 1:11, and he wants to create an output that is 12:12.

Did I misread?

ak

Well, maybe I'm losing something in translation.

 

R1 is critical as current flows through the base-collector junction

10K is about minimum with R2 and R3 at 10K. Actually R1 is suppose to be 100K. I was copying and pasting from another schematic and forgot to change the value. Now edited on post #23
R3 can be reduced to 6.8K, setting the pin 2,6 combo to 2 volts if needed.

 

This is similar to the confusion I had...

He wants a flip flop, based on a 555 circuit (555 flip flop), whose input is 1:11 and whose output is 12:12.

Every time the input goes high, the output toggles or changes state. Otherwise, the input doesn’t change or toggle the output. Basically, a leading edge triggered T flip flop using a 555.

 

Basically, a leading edge triggered T flip flop using a 555.

Exactly, see post #23.

 

We've gone to a lot of trouble for a bloke who doesn't have a 4013!

 

Well, maybe I'm losing something in translation.

?

 

input that will be active high for 1 hour then active low for 11 hours

Then why do you need a flip flop?

 

Then why do you need a flip flop?

Because the output toggles every twelve hours.

 

The Signal shifts level. so why is a flip flop needed.

Because a signal that is high for 1 and low for 11 is not the same as one that is high for 12 then low for 12, maybe?

Notice that the period of the output is twice that of the input, and the duty cycle is 50 50. Which is exactly what a T flip flop will give you.

Bob

 

Because a signal that is high for 1 and low for 11 is not the same as one that is high for 12 then low for 12, maybe?

Notice that the period of the output is twice that of the input, and the duty cycle is 50 50. Which is exactly what a T flip flop will give you.

Bob

Ok...got it...thanks.
Specifically....an edge triggered T flip flop, or an edge triggered D flip flop configured to toggle when triggered.

 

Ok...got it...thanks.
Specifically....an edge triggered T flip flop, or an edge triggered D flip flop configured to toggle when triggered.

And the latter is a T flip flip. See post #23

 

What about using a d flip flop? I have a sn74hc574n on hand as well as a bunch of logic CMOS chips.. nand, inverters etc.

I had an extra 4017 to use as a toggle but it got ruined today, maybe I'll just build a jk latch out of discrete components to use em up

Its a little wasteful but you can make one using a 74HC574 (or 374) and an inverter

 

And the latter is a T flip flip. See post #23

If you're referring to my post #52, it can be an edge triggered D-Type flip flop configured to toggle when triggered.
The result is equivalent functionality as an edge triggered T-Flip flop.

 

7 unused (and probably unusable since there is only one clock input) stages plus another chip to get the inverter. That seems like a loooong way to go for one flipflop.

ak

 

7 unused (and probably unusable since there is only one clock input) stages plus another chip to get the inverter. That seems like a loooong way to go for one flipflop.

ak

Yes...I agree. but it will work.

 

maybe I'll just build a jk latch out of discrete components to use em up

Once you get away from using a 555, there are a lot of options. The most simple is using any one of many single or dual D flipflops, such as the CD4013. If you want to build from scratch, search for:

D flipflop schematic

to get lotsa variations.

Many of them follow the same method:



I also have this in my files, but I don't know where it came from. It is not a common method so if it might have a race problem, but I like that it gets the circuit down to one package.



ak

 

Thanks everyone, I'll be trying each of the suggestions

Originally I was interested in using a 555 to somehow make a T flip flop but I've quickly discovered there are many ways to perform this operation however proper feedback is critical

My design requirements are

Toggle at the rising OR falling edge of a cmos logic level input, the 4017 datasheet (the input clock signal) specifies logic high 4.95v and logic low 0.05v @ 5v vcc

It doesn't matter if it rising or falling edge as I can place it at the 11 bit or at the 12 bit location in my circuit, however the 12 bit will stay logic high for 1 hour