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Before I order more parts, I just wanted to check whether the button used in your schematic is a normal pushbutton or an alternate action button?
555 toggle and dual timers pulling current when toggle is off
- Thread starter Ross Satchell
- Start date
Normal pushbutton. The toggle flipflop section is functionally identical to that in your schematic. IC4 pins 6 and 2 combine to form a hysteresis-input gate, similar to the input of a 4093 or 40106 but with wider hysteresis.
4093/40106: 40% / 60%
555: 33% / 67%
The feedback that makes the circuit latch in either state is internal in the 555, and external in R2 in my circuit. Because the 555 latch feedback doesn't actually touch the input pins, two resistors are needed to keep the input centered between the two transition levels whenever the switch is open.
ak
4093/40106: 40% / 60%
555: 33% / 67%
The feedback that makes the circuit latch in either state is internal in the 555, and external in R2 in my circuit. Because the 555 latch feedback doesn't actually touch the input pins, two resistors are needed to keep the input centered between the two transition levels whenever the switch is open.
ak
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So I've been going over circuit diagram you provided and I just want to check that I (at least partly) understand whats going on.
I found an equation that gives the frequency: f = 1.2 / (R C)
So starting from the RHS of the schematic and working my way back :
U1D is just inverting the previous inverter (U1E)
U1E has a frequency of 1.2 / (56k * 1uF) = 12.4Hz => Period = 46ms
From my understanding D2 makes it possible to raise the
voltage the cap (C4) can charge to, altering the charge time, but I'm not sure how much it would increase the charge time.
U1F has a frequency of 1.2 / (460k * 1uF) = 2.6 Hz
I'm not sure what's happening with U1A and U1B.
1. What equation did you use, and please post a link. It is different from the one I used, and produces a higher frequency result.
2. Your equation works out to 21.4 Hz, for an LED on time of 23 ms.
3. D1 and D2 act as gates, or enable switches. When U1B is high, it holds the voltage on C3 at a high value no matter what the output of U1F is. This stops oscillation, and forces U1F low. When U1B is low, the diode never is forward biased and is essentially an open circuit, allowing U1F to oscillate. The same action lets U1F control the oscillation of U1E. The diode polarities are chosen such that when the flipflop section inhibits everything, the logic polarity of U1D is low, holding the LEDs off.
4. U1A and U1B form a toggle flipflop identical to IC4 in your schematic.
When the diodes are conducting, they do impart a DC voltage on the capacitors. However, this is a consequence of them not being ideal diodes, not the reason they are in the circuit. That DC voltage does change the period of the first half-cycle of each oscillator when it is enabled, but I don't see it as a problem in this application.
In choosing the part values on the schematic, I used the equation for a CMOS oscillator part I often use. That was an error, as the Schmitt trigger parts behave differently. I've never actually worked through the math before, so here goes...
All oscillator circuits have start-up issues, usually related to the fact that the voltage range across the capacitors during stable operation is different from the voltages on the caps at startup (usually 0 V). For example, a 555 oscillator starts with 0 V across the cap. This rises to 2/3 Vcc during the first half-cycle. But in the second half cycle it decreases to 1/3 Vcc, not 0 V. Using the standard equation for an R-C charging circuit, you can calculate the charging time to 1/3 Vcc and 2/3 Vcc. Based on these numbers, the first half-cycle is longer than all following half-cycles by about 58%.
Using the same methods with the CMOS Schmitt trigger transition levels, the equation for frequency (not counting the first half-cycle) is:
f = 1.233 / (R x C)
This is much closer to your equation than the one I used, so you win. Based on this, you can adjust the values of R3 and R4 to get the performance you want.
Note that the CMOS transition levels are not fixed percentages of Vdd; they can vary as much as 5% over the Vdd operating range and with temperature.
ak
2. Your equation works out to 21.4 Hz, for an LED on time of 23 ms.
3. D1 and D2 act as gates, or enable switches. When U1B is high, it holds the voltage on C3 at a high value no matter what the output of U1F is. This stops oscillation, and forces U1F low. When U1B is low, the diode never is forward biased and is essentially an open circuit, allowing U1F to oscillate. The same action lets U1F control the oscillation of U1E. The diode polarities are chosen such that when the flipflop section inhibits everything, the logic polarity of U1D is low, holding the LEDs off.
4. U1A and U1B form a toggle flipflop identical to IC4 in your schematic.
When the diodes are conducting, they do impart a DC voltage on the capacitors. However, this is a consequence of them not being ideal diodes, not the reason they are in the circuit. That DC voltage does change the period of the first half-cycle of each oscillator when it is enabled, but I don't see it as a problem in this application.
In choosing the part values on the schematic, I used the equation for a CMOS oscillator part I often use. That was an error, as the Schmitt trigger parts behave differently. I've never actually worked through the math before, so here goes...
All oscillator circuits have start-up issues, usually related to the fact that the voltage range across the capacitors during stable operation is different from the voltages on the caps at startup (usually 0 V). For example, a 555 oscillator starts with 0 V across the cap. This rises to 2/3 Vcc during the first half-cycle. But in the second half cycle it decreases to 1/3 Vcc, not 0 V. Using the standard equation for an R-C charging circuit, you can calculate the charging time to 1/3 Vcc and 2/3 Vcc. Based on these numbers, the first half-cycle is longer than all following half-cycles by about 58%.
Using the same methods with the CMOS Schmitt trigger transition levels, the equation for frequency (not counting the first half-cycle) is:
f = 1.233 / (R x C)
This is much closer to your equation than the one I used, so you win. Based on this, you can adjust the values of R3 and R4 to get the performance you want.
Note that the CMOS transition levels are not fixed percentages of Vdd; they can vary as much as 5% over the Vdd operating range and with temperature.
ak
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Sorry for my late reply, I have been swamped with school work.
Thank you for your detailed answer on the functioning circuit, I'm still going over it to understand what is going on.
I got my equation from: http://www.talkingelectronics.com/pay/BEC-2/Page49.html
I have noticed when I breadboarded out the circuit you posted that the LEDs flash continually at about 4Hz.
With the 555 timer circuit I was originally using I was using one 555 for the faster frequency of something around 4Hz, while I was using the other 555 at a much slower frequency of something around 1.5Hz.
By using the 1.5Hz circuit to provide power to the 4Hz circuit I was getting a strobe effect where it would flash quickly for about 1.5 sec, then stop for about 1.5 sec, the flash quickly again.
Is there a way to accomplish this using the CD40106?
Would I need a second 40106 set up for a much slower frequency and use that to drive the current one?
