Hello,
I'm trying to simulate the 555 timer bistable circuit on Multisim and LTSpice. I may have done something wrong, because I'm not getting the expected behavior.
When Reset and Trigger is pulled high I expect the output to be low, but it's not.
Schematic:
(LTSpice schematic file include below.)
This is the behavior that I expect (java applet):
Please shed some light
I'm trying to simulate the 555 timer bistable circuit on Multisim and LTSpice. I may have done something wrong, because I'm not getting the expected behavior.
When Reset and Trigger is pulled high I expect the output to be low, but it's not.
Schematic:
(LTSpice schematic file include below.)
This is the behavior that I expect (java applet):
Rich (BB code):
http://www.falstad.com/circuit/#$+1...18+64+0+39+7.62939453125E-5+9.765625E-5+0+-1
Scope 1: Reset
Scope 2: Trigger
Scope 3: Output
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