5.3 Microsecond Delay

Thread Starter

GuiltClause

Joined Aug 6, 2017
11
I am working with an analog video to analog video encoder (RGB > YPbPr / Svideo / Composite, the BA6592F) and having some difficulty. The encoder asks for a pulse I don't have.

The encoder expects a pulse that the datasheet refers to as 'pedestal clamp' and I have a rough idea of what it does. Judging by the timing chart it seems to be identical to the burst flag pulse, which I also do not have. What I do have is a Horizontal Sync pulse (normally high, active low). So what I have been trying to do is to fork the sync pulse, and then run a shortened and delayed version of that pulse into the Pedestal Clamp pin. This would require delaying the falling edge by 5.3 microseconds (and shortening the pulse by 2.2 microseconds, which I believe I can do with a carefully selected capacitor to ground through some kind of equation).

I have attempted to use an LTC6994-2 for this, but I... couldn't really figure out how to use the chip, even after using their spreadsheet tool. I assume that it failed because I'm dealing with a normally high, active low pulse.

All of my video timing assumptions here come from Maxim Integrated's chart here:
https://www.maximintegrated.com/en/images/appnotes/734/DI39Fig05.gif
For all intents and purposes, the sync tip is the Horizontal sync pulse I've been talking about. Pedestal clamp pulse and burst flag pulse would both be active during the colorburst section.

That's about as far as I've gotten though. I can't find any analog delay lines that are the right length (or would be affordable if I were to place several in series). Is there some kind of small device that can accomplish this delay, or a way to build it?

It's worth mentioning that I'm not positive about my timing requirements, so the better I understand this the more I can fiddle with it... Any words are appreciated, because I'm all out of ways to google this one.
 

AnalogKid

Joined Aug 1, 2013
12,109
What you are doing is a back porch clamp. The pedestal is what is called black level or setup in your chart.

Back in the day, we did this with two 74121's. The first one (the delay) was triggered off of the leading edge of sync, and the second one (the clamp pulse) was triggered by the trailing edge of the first one. The 74121 had transition levels for the R-C node that were more precise than normal TTL inputs, so the pulse width was more stable with temperature and more repeatable across components. Even with all of that, the better equipment had trim pot adjustments.

Please post the datasheet for the encoder.

ak
 

crutschow

Joined Mar 14, 2008
38,458
The 74121 had transition levels for the R-C node that were more precise than normal TTL inputs, so the pulse width was more stable with temperature and more repeatable across components.
Yes, the 74121 is pretty stable with temperature.
Many years back I was working with a commercial scanning resonant mirror driver and the driver electronics used a standard transistor one-shot circuit. This kept drifting with temperature as the electronics warmed up due to Vbe change, which fouled up the resonant operation and I had to tweak the one-shot time every time I used the circuit.
So I found where the one-shot was on the circuit board and replaced it with a 74121.
Had no problem with temperature drift after that.
 

RichardO

Joined May 4, 2013
2,270
I haven't had a chance to read much about the 74121 yet, but I'm excited that something has come in so quickly.
While you are doing your research you should look at the 74123 as well. It is a dual similar to the 74121. I think either one will work in your application.
 

Thread Starter

GuiltClause

Joined Aug 6, 2017
11
http://www.ti.com/lit/ds/symlink/sn54121.pdf

I've read through this about 3 times now and I'm very confused.

The datasheet mentions that this chip needs external timing components in order to delay by something besides 30 nanoseconds. I don't think it ever sheds any light on what those components are. Is there a different document I should be looking at? I was expecting to find something along the lines of "put a capacitor between these two pins, and here's the equation for that capacitor's effect on the output pulse length".
 

crutschow

Joined Mar 14, 2008
38,458
No equation, but you can use Figures 6 and 7 to determine the appropriate resistor and capacitor values for the pulse widths you need.
For a precise value you can use a pot in series with the resistor to tweak the time.
 

AnalogKid

Joined Aug 1, 2013
12,109
http://www.ti.com/lit/ds/symlink/sn54121.pdf
The datasheet mentions that this chip needs external timing components in order to delay by something besides 30 nanoseconds. I don't think it ever sheds any light on what those components are. Is there a different document I should be looking at? I was expecting to find something along the lines of "put a capacitor between these two pins, and here's the equation for that capacitor's effect on the output pulse length".
Equation: Page 1, last paragraph.

Schematic: https://images.search.yahoo.com/sea...UkyQzNfMQRzZWMDcGl2cw--?p=74ls121&fr2=piv-web

ak
 

AnalogKid

Joined Aug 1, 2013
12,109
TI datasheets are way below average in terms of design examples (witness no schematic of a basic timer circuit), but even they had to have the equation in there somewhere.

ak
 
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