What is the parasitic lateral transistor effect (edge transistor)?
What is its effect on the Id x Vg curve?
What should be done to avoid it?
I read the book is not understood this 3 situations?
who can help I am grateful.
Book: SILICON-ON-INSULATOR TECHNOLOGY: MATERIALS TO VLSI 3rd Edition
What is its effect on the Id x Vg curve?
What should be done to avoid it?
I read the book is not understood this 3 situations?
who can help I am grateful.
Book: SILICON-ON-INSULATOR TECHNOLOGY: MATERIALS TO VLSI 3rd Edition