How is this 3-level buck converter working perfectly? I’ve supplied the input voltage through the source of the MOSFET. Is it supposed to work this way? When I connected the drain to Vin instead, it didn’t work. What could be the reason for that?

 

hi
Please post your asc file
E

 

Hello, please find the attachment. Thank you!

 

Your MOSFETs appear to be backwards... M1 and M2 would just let current from the 20v supply flow through their body diodes to the output, and back to ground through M4 and M3. Hence the output is 10v.

Your gate voltages must be referenced to their respective source pins, not to ground else the upper MOSFET(s) might not turn on as you intended.

Having said all of that, this is the weirdest buck converter I've ever seen... where did you get this circuit from?

 

Your MOSFETs appear to be backwards... M1 and M2 would just let current from the 20v supply flow through their body diodes to the output, and back to ground through M4 and M3. Hence the output is 10v.

Your gate voltages must be referenced to their respective source pins, not to ground else the upper MOSFET(s) might not turn on as you intended.

Having said all of that, this is the weirdest buck converter I've ever seen... where did you get this circuit from?

That's a Flying Capacitor Multilevel Buck Converter. I am working on balancing the flying capacitors (C3-C1) voltage on this type of converter.

 

Ah, yes, I vaguely have heard of them...

Use better MOSFETs. The channel resistance of the BSP89 is nearly the same as the output load so distorts the results... here's a working one based on the attached TI paper

 

Awesome! Thank you!
Now it's giving me a perfect 10V, at 20V of input. However, the main problem is that the Flying Capacitor (C2) is supposed to have half of the input voltage (10V), but I am getting 5V across it. I actually don't know how to make it work.

 

Ah, yes, I vaguely have heard of them...
View attachment 357239
Use better MOSFETs. The channel resistance of the BSP89 is nearly the same as the output load so distorts the results... here's a working one based on the attached TI paper

View attachment 357242

Awesome! Thank you!
Now it's giving me a perfect 10V, at 20V of input. However, the main problem is that the Flying Capacitor (C2) is supposed to have half of the input voltage (10V), but I am getting 5V across it. I actually don't know how to make it work.

 

Hmmm...let me think on this...got to eat now...

 

Hmmm...let me think on this...got to eat now...

I can’t eat until I fix this hahaha

 

Right, this is now working correctly as far as I can tell. I've renamed things to match the numbering in the TI document. I've also added LTSpice parameters for frequency and duty cycle, and dly1 and dly2 add dead time between G3/G4 and G1/G2 respectively to try and address high current spikes at the switchover. However, even 25nS of dead band causes some weird changes in its operation which I don't understand fully (see second chart with dly1 = dly2 = 25n). I also increased gate voltages to 10v to ensure MOSFETs are fully turned on.

 

Right, this is now working correctly as far as I can tell. I've renamed things to match the numbering in the TI document. I've also added LTSpice parameters for frequency and duty cycle, and dly1 and dly2 add dead time between G3/G4 and G1/G2 respectively to try and address high current spikes at the switchover. However, even 25nS of dead band causes some weird changes in its operation which I don't understand fully (see second chart with dly1 = dly2 = 25n). I also increased gate voltages to 10v to ensure MOSFETs are fully turned on.

View attachment 357347

View attachment 357349

Thank you so very much!