I am trying to get a project working where I am supplying data from an (Altera) FPGA's GPIO pins to a different reader device. I thought I could connect the 3.3v pins from the FPGA directly to the other system and be okay. At 5.8 MHz, where I need to be, there is a lot of ringing in my square waves. I am looking for a chip or configuration that will either condition the existing FPGA signal or more preferably a push-pull type line driver that will condition the signal from the FPGA, read it properly and output a clean square wave at 5.5-6 MHz. Attached is an image of the signal at the FPGA where the GPIO pin is only connected to my o-scope.
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