Hello,

Please find the attached simulation file of my circuit.
During simulation I can see an initial peaking at the instrumentation amplifier (U6) output.

May I know why it is happening.

Rrgards

 

hi hoy,
Your sim runs forever???
E

 

Hi Eric,

No

 

Hi,
Tried 2 PC's, it will not solve.
Have you modified the LTS parameters????
E

 

Fomr me it is working.
My concern is the initial peaking shown in green

 

The peaking is likely an artifact of how SPICE calculates the initial starting conditions.
Here is my sim using the startup option which ramps up the supply voltages:
I also had to modify my SPICE settings as shown below to get it to simulate in a reasonable time.

 

Thank you now it is working.

 

I replaced all athe ADI parts with equivalent TI Parts.Lot of ringing at the output.Can you please check the attached file.

 

I replaced all athe ADI parts with equivalent TI Parts.Lot of ringing at the output.Can you please check the attached file.

Sorry, I don't have those TI models and don't want to install them.

Ringing could indicate a feedback loop instability.
Trace the signal through the circuit and see if you can determine its starting point.

 

With no emitter resistors Q1 and Q2 have a lot of voltage gain in the loop. I would add emitter resistors to both such that the conversion of Q1 base voltage to Q2 collector current is much more predictable and linear. As needed add loop gain by adding gain to U2 via boosting R4. I'm also wondering if a series RC from Q2 collector to U2 - input might also help kill oscillation.

 

Quite a constant current regulator circuit for the PT100 sensor. Of course there will be a spike until the capacitors charge up in the PT100 current supply.

 

Hi,

I am attaching the simulation file of one of my circuit.It consists of many opamps and BJT's. I know how to check the stability of this circuit(I know it for single opamp circuits).

My input is V3(I_PT100_SET) and output is I_PT100_ACT .

Below is the output waveform.I can see some ringing initially.Can you please help me to compensate it.

 

With no emitter resistors Q1 and Q2 have a lot of voltage gain in the loop. I would add emitter resistors to both such that the conversion of Q1 base voltage to Q2 collector current is much more predictable and linear. As needed add loop gain by adding gain to U2 via boosting R4. I'm also wondering if a series RC from Q2 collector to U2 - input might also help kill oscillation.

May I know How do I design resistors.

" boosting R4 " you mean increasing the value of R4

 

Until the capacitors charge to a stable voltage the circuit will not be in the stable conditions. Designing to avoid startup transients is often a challenge. Just exactly WHAT is C1 (22nF) doing for you?? That is undoubtedly the source of your spike, aside from the effects of assorted stray couplings.

 

Until the capacitors charge to a stable voltage the circuit will not be in the stable conditions. Designing to avoid startup transients is often a challenge. Just exactly WHAT is C1 (22nF) doing for you?? That is undoubtedly the source of your spike, aside from the effects of assorted stray couplings.

That is a PI controller. C1 is a part of that.

 

Hi hoy,
Please post the sub/mod files and asy files for your latest Post #12 circuit and I will run a simulation.
E

 

please see the file

 

hi hoy,
This is what I see, why do you consider the small initialising negative spike is a problem?
E

 

Thank you .
If you don't mind could you please check the current through R13.
There is a peaking there

 

hi.
As you are skipping the initial state by using uic in your Tran, LTSpice is creating that high current artifact.
Without uic, this my plot.
E