Why sink current is more than source current ?
- Thread starter freak101
- Start date
panic mode
- Joined Oct 10, 2011
- 2,753
take a look at internal schematic of any TTL output stage.
there is an NPN transistor that provides low impedance path to 0VDC rail while there is resistor (higher resistance path) to +5VCD.
there is an NPN transistor that provides low impedance path to 0VDC rail while there is resistor (higher resistance path) to +5VCD.
It's the nature of the beast.
In order to make a TTL input LOW, it is necessary to sink current (meaning make current flow from the input to ground - this is "conventional" current which flows from positive to negative). For the original SN74xx standard TTL family, this current was 1.6 mA.
An open-circuit TTL input will "float" HIGH, but to be absolutely certain it is high it is best to put (or try to put) some current into the input - source current to it. For the 7400 family, this current was specified to be 40 µA, maximum - usually it was less because it was essentially reverse leakage current in a PN junction.
Because of these characteristics, the outputs need proportional characteristics, so sink current was higher than source current. The current limitations went with the concept of "fan-out." For 7400, the maximum fanout was 10, so the sink current capability was spec'd as 16 mA and the source current as 400 µA, both while assuring some "noise margin" at their respective logic levels (e.g. output LOW spec'd to be not more than 0.4 V at max fanout, while an input was spec'd as guaranteed to interpret any voltage up to 0.8 V as logic LOW, giving 0.4 volts of noise margin)
Standard TTL surely was a power hog. The orginal schottky TTL was even worse and ECL as (and generally still is) worse than schottky.
In order to make a TTL input LOW, it is necessary to sink current (meaning make current flow from the input to ground - this is "conventional" current which flows from positive to negative). For the original SN74xx standard TTL family, this current was 1.6 mA.
An open-circuit TTL input will "float" HIGH, but to be absolutely certain it is high it is best to put (or try to put) some current into the input - source current to it. For the 7400 family, this current was specified to be 40 µA, maximum - usually it was less because it was essentially reverse leakage current in a PN junction.
Because of these characteristics, the outputs need proportional characteristics, so sink current was higher than source current. The current limitations went with the concept of "fan-out." For 7400, the maximum fanout was 10, so the sink current capability was spec'd as 16 mA and the source current as 400 µA, both while assuring some "noise margin" at their respective logic levels (e.g. output LOW spec'd to be not more than 0.4 V at max fanout, while an input was spec'd as guaranteed to interpret any voltage up to 0.8 V as logic LOW, giving 0.4 volts of noise margin)
Standard TTL surely was a power hog. The orginal schottky TTL was even worse and ECL as (and generally still is) worse than schottky.
just occurred to me that you might be asking "why not make them equal?"
TTL is made almost entirely with NPN transistors. The sink output transistor is a common-emitter, which is easy to drive hard to turn it on and pull a light load within tens of millivolts of ground. The source transistor is an emitter follower (common collector), which can't get closer than about 0.7 V to the supply rail. Since there is no need for it to source much when TTL is driving TTL, the transistor can be made smaller, which simply saves chip real estate. Some TTL parts had "open collector" outputs that were current-sinking only.
Lots of real-world drive circuits for all kinds of things from transformers in switch mode power supplies to LEDs to relays are driven with "low side" current-sinking drivers, mostly because it is usually easier in circuitry powered from a supply positive with respect to common. NPN bipolars and N-channel MOSFETs are generally faster than PNP and P-channel and easier to make in silicon. PNP bipolars were easier with germanium.
TTL is made almost entirely with NPN transistors. The sink output transistor is a common-emitter, which is easy to drive hard to turn it on and pull a light load within tens of millivolts of ground. The source transistor is an emitter follower (common collector), which can't get closer than about 0.7 V to the supply rail. Since there is no need for it to source much when TTL is driving TTL, the transistor can be made smaller, which simply saves chip real estate. Some TTL parts had "open collector" outputs that were current-sinking only.
Lots of real-world drive circuits for all kinds of things from transformers in switch mode power supplies to LEDs to relays are driven with "low side" current-sinking drivers, mostly because it is usually easier in circuitry powered from a supply positive with respect to common. NPN bipolars and N-channel MOSFETs are generally faster than PNP and P-channel and easier to make in silicon. PNP bipolars were easier with germanium.
Exactly, it all depends on the internal schematic of a given IC, that is on the guts of IC.
While in this position: https://payhip.com/b/5Srt "ch. 1.3. Maximum output current" focuses on the problem of the imbalance of output sourced/sunk current, but it is in the paid version, take a look on:
- ch. 2 OPAMP CLASSES
- ch. 3.1.1. 2-stages class A
which are in the free version (click Preview button).
Hope it will help you to understand the topic in details as in the "ch. 3.1.1. 2-stages class A" the architecture that is very often used in analog IC design:
is discussed and one of the drawbacks of this architecture is the imbalance of output sourced/sunk currents. The problem you would like to understand.
While in this position: https://payhip.com/b/5Srt "ch. 1.3. Maximum output current" focuses on the problem of the imbalance of output sourced/sunk current, but it is in the paid version, take a look on:
- ch. 2 OPAMP CLASSES
- ch. 3.1.1. 2-stages class A
which are in the free version (click Preview button).
Hope it will help you to understand the topic in details as in the "ch. 3.1.1. 2-stages class A" the architecture that is very often used in analog IC design:
is discussed and one of the drawbacks of this architecture is the imbalance of output sourced/sunk currents. The problem you would like to understand.
Last edited:
Bordodynov
- Joined May 20, 2015
- 3,180
A little objection. 40 μA is not a leak, but the reverse mode current of a multi-emitter, input transistor. The collector area of transistors is doped with gold at 74S and the transistor has a low reverse gain (about Br=0.03). Therefore, the current is so small. Leakage of diodes is much less!
