Hey guys,
You see, I am reading this book, "digital electronics" -- the demystified version. Where I am reading is on section "Logic Gate input and Output". I've added here one of his page without permission (i gotta get this one), so can you please help me understand what he means by that diagram? How do these input gates work.
I understand the concept of NPN transistors.
Thanks much,
Vlad Tess
You see, I am reading this book, "digital electronics" -- the demystified version. Where I am reading is on section "Logic Gate input and Output". I've added here one of his page without permission (i gotta get this one), so can you please help me understand what he means by that diagram? How do these input gates work.
I understand the concept of NPN transistors.
Thanks much,
Vlad Tess