If the circuit was wrong to start with, then you might have blown the regulator, then you fixed the fault, but not the regulator.

 

Do you have a scanner? Just place the drawing on the scanner next time.

Or better download something like DipTrace. It is easy to use. ExpressPCB is probably easier but DipTrace has more features.

No I don't have any scanner. DipTrace ok I will remember this. Is it freeware?

 

No I don't have any scanner. DipTrace ok I will remember this. Is it freeware?

Yes it is free to a certain pin count limit but you probably won't reach it any time soon.

 

The back EMF could damage the transistors.

If the AND gate you're using is 7408, you're over stressing the part. Max VCC is 5.5V. It will tolerate 7V (non-operating).

I did not know that. Thanks for the information.

 

The schematic still does not make sense.

What is the hex inverter doing? Where are it's inputs?

Unless the 7408 is CMOS compatible (74HC08), there is no way 100k pull down resistors are going to work.

Passive pull downs do NOT WORK when using non HC 74..logic.

Tying unused 74 series logic inputs to 0v, while possible, consumes a lot of unnecessary power.

Just pull down pull up input resistors actively.

 

Driving 6V rated relays from a 9V supply is not good practice. They will draw more current than intended.

 

The schematic still does not make sense.

What is the hex inverter doing? Where are it's inputs?

Unless the 7408 is CMOS compatible (74HC08), there is no way 100k pull down resistors are going to work.

Passive pull downs do NOT WORK when using non HC 74..logic.

Tying unused 74 series logic inputs to 0v, while possible, consumes a lot of unnecessary power.

Just pull down pull up input resistors actively.

Purpose of this circuit is to controll pump unit according to water level in overhead tank. This type of circuit could be easily made using only 555 timer. but one of my friend wanted that the relay will operate for short time. so i designed this circuit to drive a DOL with two relays. one for start another for stop. thus making the relays short time operative. Hex inv is part of input logic. quad 2 input AND gate are wired as dual 3 input AND. Input 1 and input 2 comes from over head tank, NC of magnetic contactor sends motor status i.e. running or resting, 555 timer wired as MMV and intened to delay the operation when power is just on. LM 358 is used here for shut down the motor in abnormal voltage condition. Not a genious design though but i made what i understood.
I dont understand CMOS compatibility but this circuit is working.
Did you mean 74xx series ICs waste power when inputs are hold low?

 

I thought that the regulator was damaged so i replaced it but surprisingly nothing happend! Voltage dropped again. Then i thought that let remove the 10 nF capacitor and see. Finally problem solved. 9V constantly at the output. May be 10 nF capacitor was defected.

 

Use 100nf at input and output of regulator.

 

I dont understand CMOS compatibility but this circuit is working.
Did you mean 74xx series ICs waste power when inputs are hold low?

You will have to excuse me, but I remember when you could confuse the date code with the part numbers on 74 series ICs'.

As you can see from the attachments, there is a great difference between the two logic families.

Your part is undoubtedly a CMOS compatible part (a 74HC08).

I think that you can see that trying to pull down a 74ls08, or a 7408 with a 100k resistor would be a fools errand.

Also you can see tying a 7408 low would consume a lot more power than tying it hi.

Also, I just remembered that over voltaging (probably not a word but..) CMOS logic can cause a latching or scr action. When this occurs the device can draw lots of current. Kinda like activating a SCR across a power supply. (See crow bar circuit).

 

I made a project where two 6V relay is supplied from a 9v regulated dc supply. this dc supply is made up with 12V transformer, bridge rectifier, 100uF filtering cap, LM 7809 and a 10nF cap.
when no relays are energized output voltage is nearly 9v. when one relay is energized voltage drops to nearly 7v. and when both relays are energised voltage drops to nearly 5v. each relay is driven by bc547 transistor with 1k base resistor. is this normal? or is regulator damaged? will it be fixed if I replace it with new one? what should I do to get constant 9v output without modification at relay side?

Before going any further - monitor the unregulated rail and watch the voltage there when the relays are energised. Unless you're using LDO regulators, they need a headroom of at least 2V more than the expected regulated output.

Someone suggested increasing the reservoir capacitor to 1000uF - large ripple would confuse your DMM, and the (supposedly) smooth DC could be dipping below the required headroom between peaks.