What is "pole at the origin" in a compensation network?

Thread Starter

SiCEngineer

Joined May 22, 2019
444
Hi all.

I am trying to compensate a SMPS which generates 6kV on the output. The value of the first divider resistance is usually in the order of 10Meg-100Megohms so that the amount of current draw into the divider chain is minimized. However when I come to calculating the compensation components, (using: http://www.ti.com/lit/an/slva662/slva662.pdf?ts=1588019717731), the high value of R1 pushes my capacitors to be very small values, such as say in the order of 10^-15 Farads. I think this is because I do not understand the term "alongside the pole at the origin, fp0". The paper gives no indication on how to calculate this frequency. Or how to determine where to place it.

I worked off the assumption that it should be zero, since "origin", but this obviously cannot be the case as it would then push some of the capacitance values to infinity. I placed fp0 at 6kHz arbitrarily which gave the very small capacitance as above. I then tried to change it to 500hz, which gives a more reasonable capacitance of 5pF, but it is still small and then the assumption that if this capacitance (C1) is much bigger than the other (C3), then the equations simplify, is no longer valid as the C1 is already very small.

Anyway, my question is - what is the pole at the origin? How do I know where to place it, or how to calculate it?
 

Papabravo

Joined Feb 24, 2006
21,228
The origin in the complex s-plane is at the point 0 + j0. Both the real and the imaginary part of the coordinates of the point are zero. It is possible for there to be either a pole or a zero at the origin. Both seems unlikely since they would cancel each other in the transfer function. Normally you want poles in the left half plane, because either the positive real part disappears or the system does. Poles and zeros on the jω-axis occur in oscillators and bandpass filters.

How about a schematic and a description of how you came up with your values that are leading into this rabbit hole.

What page in the TI document are you referring to?
 

Thread Starter

SiCEngineer

Joined May 22, 2019
444
The origin in the complex s-plane is at the point 0 + j0. Both the real and the imaginary part of the coordinates of the point are zero. It is possible for there to be either a pole or a zero at the origin. Both seems unlikely since they would cancel each other in the transfer function. Normally you want poles in the left half plane, because either the positive real part disappears or the system does. Poles and zeros on the jω-axis occur in oscillators and bandpass filters.

How about a schematic and a description of how you came up with your values that are leading into this rabbit hole.

What page in the TI document are you referring to?
Thank you for your reply. I did assume it meant 0+0j in the s-plane. However I am confused how one would then select what real frequency this occurs at. Is it 500Hz? Is it 5kHz? How can you tell? Is it a matter of plotting the open-loop gain and trying to interpret it in the bode plot?
 

Thread Starter

SiCEngineer

Joined May 22, 2019
444
Hope you remember the 5pF capacitor has 6000 volts across it. Its value seem like a good place to start.
Ah! A good point. So I should start by assuming a small capacitor in the upper divider chain of the type 3 compensator. I suppose the assumption that is within the document is therefore no longer valid and the calculations become more complex? The page I refer to is 8 and 9.
 

Thread Starter

SiCEngineer

Joined May 22, 2019
444
Heres an example of my working using a 5pF capacitor as C2 (upper divider resistor chain capacitor).
It gives the result as R1+R3 = 936kOhms. This is where my issue is originating - using too high a value for R1 (say, 100MEG) messes up all of the equations for the compensator, both type 2 and 3. The cut-off frequency of my output pi-filter is 33kHz. I will send an LTSpice schematic ~tomorrow. Thanks both.

EDIT: Notice that the frequency should be 0.75 x F_LC in the equation at the bottom, not just F_LC. I have corrected this but the resistance value then still comes out as a value in the range just over 1MEG.
 

Attachments

Papabravo

Joined Feb 24, 2006
21,228
Thank you for your reply. I did assume it meant 0+0j in the s-plane. However I am confused how one would then select what real frequency this occurs at. Is it 500Hz? Is it 5kHz? How can you tell? Is it a matter of plotting the open-loop gain and trying to interpret it in the bode plot?
0 radians per second is the same frequency as 0 Hz. The pole at the origin also affects nearby frequencies. If you think of the s-plane as a rubber sheet stretched over very tall tent "poles" and nailed to the σ-jω plane at the zeros. Then I tell you that the Bode plot describes this surface along the jω-axis it might help.
I will take a look at pages 8 and 9 and get back to you.
 

Papabravo

Joined Feb 24, 2006
21,228
I think I see what is going on. There is a missing line on page 4. Note the line for fp0 = and then there is a blank. If you go down 4 lines you can see an expression for C1 where you can infer that:
fp0 = (2*π*R1*C1)^-1

This pole at the origin is not actually at the origin, it is only approximately there. I would infer from the graph in figure 4 that it might be at 10 Hz. or so.
On page 9 the formula for fp0 is the same. How are you choosing R1 and C1 so that fp0 = 10 Hz.

Why are you insisting on using 5pf for C2. Why not tell us where you think fp0, fz1, fz2, fp1, and fp2 should be that would make this whole exercise much easier.
 
Last edited:

Thread Starter

SiCEngineer

Joined May 22, 2019
444
I think I see what is going on. There is a missing line on page 4. Note the line for fp0 = and then there is a blank. If you go down 4 lines you can see an expression for C1 where you can infer that:
fp0 = (2*π*R1*C1)^-1

This pole at the origin is not actually at the origin, it is only approximately there. I would infer from the graph in figure 4 that it might be at 10 Hz. or so.
On page 9 the formula for fp0 is the same. How are you choosing R1 and C1 so that fp0 = 10 Hz.

Why are you insisting on using 5pf for C2. Why not tell us where you think fp0, fz1, fz2, fp1, and fp2 should be that would make this whole exercise much easier.
I did actually think that. I wasn't sure, so I assumed there was something missing. Thanks for clarifying that part. Well, I chose 5pF randomly, and then Ron said it was a good starting point, since the high voltage across it. I have seen in this document by PLEXIM where to place the poles and zeros for type 3: https://www.plexim.com/support/application-examples/1026. The value of my output capacitor is a small pulsed capacitor, 0.0025uF, meaning that the Frequency of this pole is quite high and should be able to be ignored. Therefore I chose to place it somewhere in between the zero and the pole.

FPO = 10Hz, FZ1 = 25.5KHz, FZ2 = 50KHz, FP1 = 180KHz, FP2 = 250kHz. My plan was to then adjust this after observing the time domain transient response. I will recalculate now with these values using 10Hz as FPO.
 

Papabravo

Joined Feb 24, 2006
21,228
I did actually think that. I wasn't sure, so I assumed there was something missing. Thanks for clarifying that part. Well, I chose 5pF randomly, and then Ron said it was a good starting point, since the high voltage across it. I have seen in this document by PLEXIM where to place the poles and zeros for type 3: https://www.plexim.com/support/application-examples/1026. The value of my output capacitor is a small pulsed capacitor, 0.0025uF, meaning that the Frequency of this pole is quite high and should be able to be ignored. Therefore I chose to place it somewhere in between the zero and the pole.

FPO = 10Hz, FZ1 = 25.5KHz, FZ2 = 50KHz, FP1 = 180KHz, FP2 = 250kHz. My plan was to then adjust this after observing the time domain transient response. I will recalculate now with these values using 10Hz as FPO.
The other thing to remember is that you have more flexibility choosing resistors, so pick standard values for capacitors, then calculate resistors. They come with very tight tolerances, but at a cost. For this application you definitely want NPO capacitors.

Since that first zero is at 25.5 kHz, I would think you might have more flexibility on locating fp0 if the indicate value of R1 and C1 are too constraining. Anything up to about 500 Hz. should be fine that's almost a decade and a half.
 
Last edited:

Thread Starter

SiCEngineer

Joined May 22, 2019
444
The other thing to remember is that you have more flexibility choosing resistors, so pick standard values for capacitors, then calculate resistors. They come with very tight tolerances, but at a cost. For this application you definitely want NPO capacitors.

Since that first zero is at 25.5 kHz, I would think you might have more flexibility on locating fp0 if the indicate value of R1 and C1 are too constraining. Anything up to about 500 Hz. should be fine that's almost a decade and a half.
Okay, thanks a lot, will attempt to do that also. I have two control loops, one which is the buck regulator and one which is a phse shifted resonant converter. I believe I want the buck regulator to be faster, therefore a higher bandwidth than the phase shift. What constraint does that place at all on fp0? If fp0 is higher, I assume that the cross over frequency should also be higher. But then again a type 3 comp. has a 40dB roll off, so might still cross over sooner than the buck. What are your thoughts? I have another question. To measure the open-loop gain of the system, Middlebrook says to break the loop and insert an AC source with a frequency, F. When they say open loop does this mean with no compensation components. Or should I compensate first and then measure the loop gain and bandwidth. I don't really understand how it would work without comepnsation, because then the regulator would not be able to get the converter to steady state. But then I don't understand why it says open loop gain, if I have closed the loop by including a regulator and compensation components. Sorry if I am sounding stupid, but I am new to this and very keen to learn the intricacies.

I have an LTSpice file setup ready, but wondering the best way to proceed.
 
Top