Hi All.

I'm designing a PCB incorporating dual-redundancy for RS-485 data processing and distribution. Involved in this, amongst other things, are relays which will need to be driven by both circuits (master, and slave if you will). However, should one of the processors go off-piste and drive a line high or low, it will prevent takeover by the other processor.
For this reason, instead of driving a line high (or low) to operate a transistor or optocoupler, I want to toggle a line.
Enter the watchdog timer. However these only assert for a brief, or defined, period. What I'm after is something that will output one state when the input is toggled, and another when it is stable (low OR high). In an ideal world it would have inverting and non-inverting outputs.
Toggling frequency isn't that important, I can do 2ms duty cycle up to 100's - instant response is not necessary to this usage case.

I realise this is basically a retriggerable monostable circuit, but I'm going to be pushed for space and putting >24 555's and supporting components per PCB is not really an option.

I feel like what I need almost exists in a WDT, but without 'permanent' assertion upon loss of input. There must be some IC, in an SOT-23 or similar that requires maybe 1 or 2 external components that does what I want, but I'm just not searching for the right thing.

Can anyone point me in the right direction?

Many thanks,
Tom.

 

Welcome to AAC, Tom.

I don't fully understand your question. Presumably, you are using an MCU. Which one, or to least which family?

I don't think WDT is the solution to toggling a line. There are lots of ways to do that. Say you have a single line attached to a port pin. XOR'ing with 1 will toggle that line. There are all sorts of ways to have two lines alternate between high and low. For example, if you have two lines, set one to low and the other to high, then toggle with 0x03 in a position corresponding to those pins.

You can also toggle "TRIS" (port direction register) to go between one state and a high impedance state.

More detail will help.

 

More detail will help.

Yes. Not sure why you would need >24 watchdogs on a bus. A block diagram would help with the understanding.
In the event that you DO need >24 external monitors and you can't find a suitable uC supervisor chip from Microchip, Maxim et. al. you could use something like PIC10F320 in the SOT-23-6 or DFN package. That would allow you to customize the WDT action in firmware without any external stuff assuming a suitable power supply is available.

 

Hello.

Thank you for your responses, and sorry it has taken me a while to get back.
I think I may have given the wrong impression by bringing up Watchdog timers. They are just an example of something that almost does what I need.
I have attached an input-output graph which hopefully better explains what I am looking for.
Frequencies and delays are purely examples, anything up to a few ms can be handled in code. I also don't care whether it's rising or falling-edge triggered, although I suppose it needs a pair of edges within x ms to function correctly.
Consider the times when the microcontroller drives high or low (i.e. not oscillating) to be infinite.



Again, the ~Q output is a nice-to-have and not strictly necessary!

Many thanks,

Tom.

 

Your two outputs are easy to arrange. What you show is not much different than RS232 (USART) type of communication with start and stop bits. Will there always be the same number of cycles by the "master" MCU?

In other words, set Q on the first downedge after the fist upedge, count 8 downedges, then change states again -- without or without a defined delay -- on the 9th down edge.

Edit (post-java):
It is likely your MCU and smart devices have hardware USART, you could send a unique letter (A-Z) to each device such that device A responds when it receives an A and no other letter, etc. If the devices aren't smart, a small MCU added to each will make them smart. You can do USART communications without hardware or use hardware USART.

Edit2: Why does the idle state of the MCU seem to change? If unavoidable, then the start and stop bits can be defined relative to idle state. For example, call idle state "IS" and active state "!IS." The start bit can be defined as the first transition from !IS to IS, etc. Can you explain why the MCU idle state is not consistent?

 

No, the number of cycles will not be the same, and the situation will arise that the cycling will continue indefinitely. The idea is that 2 MCU's will be capable of driving the same set of relays and optos, amongst other things.
The MCU does indeed have Hardware UARTS and USARTS - I am using 6 of them in this scenario and others are not available due to pin assignations and the need for I2C, SPI, I2S, CAN, etc.
It is possible that if (when) MCU 1 craps out, it may do so driving a line high, If it does this, it will prevent takeover by from MCU 2.
Therefore I am looking for a small chip that can be used to turn a toggling input into a stable output, but will change the output when the MCU dies. Adding individual MCU's to every relay and opto is not going to be an option unfortunately - however, it seems that I can use an FPGA per MCU to do what I need, as there are many lines to monitor, this will probably result in a smaller footprint overall.

 

<snip>
It is possible that if (when) MCU 1 craps out, it may do so driving a line high, If it does this, it will prevent takeover by from MCU 2.
Therefore I am looking for a small chip that can be used to turn a toggling input into a stable output, but will change the output when the MCU dies. Adding individual MCU's to every relay and opto is not going to be an option unfortunately - however, it seems that I can use an FPGA per MCU to do what I need, as there are many lines to monitor, this will probably result in a smaller footprint overall.

Can you change MCU1 (for example) to go high impedance instead of driving the line high when it "craps" out or id off-line? What exactly is a "crap out?" Is it a recoverable error or non-recoverable error?

If it actually drives the line high, how will MCU2 pull it low and visa versa?

 

The failure mode of an MCU cannot be determined, hence why there is a need for this device. A traditional Watchdog will be used to monitor for code-related errors etc, what we are primarily concerned with is surges on power or data lines causing physical damage to the MCU. MCU2 will be fully air-gapped until MCU1 ceases to function, when it will take over.

If it actually drives the line high, how will MCU2 pull it low and visa versa?

It can't - hence the reason for my original post, and the need for the device in question