Verifying first PCB design

Thread Starter

eb123

Joined Jul 3, 2017
74
I've designed (or attempted to) my first PCB, which implements TI's AM26C32.
The Eagle files are attached to this thread.

Could somebody kindly take a look at them, and let me know if they are suitable for manufacturing, and whether they would actually work?
 

Attachments

SLK001

Joined Nov 29, 2011
1,548
First off, remove the .ZIP file and post bitmaps of the schematics, the TOP layer, the BOTTOM layer and both the PLACE layers.
 

ericgibbs

Joined Jan 29, 2010
14,234
hi 123,
If the png images truly represent the track widths and spacings, its showing a number of track to 0V [plane] shorts.?
As you are not cramped for space I would increase the track widths and spacing from the 0V plane.
E
 

Thread Starter

eb123

Joined Jul 3, 2017
74
hi 123,
If the png images truly represent the track widths and spacings, its showing a number of track to 0V [plane] shorts.?
As you are not cramped for space I would increase the track widths and spacing from the 0V plane.
E
Which shorts are you referring to? How would increasing the trace widths remove the shorts? Cheers
 

ericgibbs

Joined Jan 29, 2010
14,234
hi,
I also said: and spacing from the 0V plane.
It maybe due to taking a screen shot of the PB, thats why I also said: If the png images truly represent the track widths and spacings

This is what I see I my screen, green circles = s/c

This is one of the problems with screen shots, the gaps maybe just artefacts of the capture method.?
E

EDIT:
Your post #6 image looks OK, zoomed.
 

Attachments

ericgibbs

Joined Jan 29, 2010
14,234
hi,
PTH = Plated thru Holes, the drilled hole is plated all the way thru.
This connects the top track to the bottom tracks.
If a hole is not plated thru and you insert a pin that extends upwards to to take a matching connector and the surface mount components are on the same side of the PCB, it means you may not be able solder the pins.
Do you follow, if not I will do a sketch.
E
AA1 31-Jul-18 17.41.gif
 
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qrb14143

Joined Mar 6, 2017
112
I'm not sure what you mean by PTH. Are you talking about the connector pins furthest right?
Plated Through Hole (PTH) means that when the manufacturer drills the holes for your header pins, they will coat the inside of the holes with conductive metal. This means that when any traces leading to that hole on the top, bottom or inner layers will be electrically connected together. This is good since these holes then behave like a via allowing you to get a signal from one layer to the other. I have never come across a professional board house that doesn't plate the through holes as standard. This can be a problem though with DIY etched boards.
 

Thread Starter

eb123

Joined Jul 3, 2017
74
The bottom layer is being used only as a ground plane, so I don't want the pins (other than the GND pin) to be electrically connected to it in any way. They do need to be connected to the traces on the top layer. What's the best way to avoid this GND connection?
 

ericgibbs

Joined Jan 29, 2010
14,234
hi,
One way is to have short tracks from the pin base, at the end of the track have a 1mm hole which picks up the top track.
Insert a tinned copper wire into the hole and solder top and bottom side.
Do you want a sketch?
E
Leave a space between the Bott track and ground plane copper. OK.?
AA1 31-Jul-18 18.08.gif
 
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Thread Starter

eb123

Joined Jul 3, 2017
74
hi,
One way is to have short tracks from the pin base, at the end of the track have a 1mm hole which picks up the top track.
Insert a tinned copper wire into the hole and solder top and bottom side.
Do you want a sketch?
E
That would be great, thanks.
 

SLK001

Joined Nov 29, 2011
1,548
Here are the changes I would make:

Screen Shot.png

I did this free-hand, so straighten out the traces and use proper miters. You have a tendency to cut your traces quite close to a pad. On a board like this, there is no need. It appears that you have a named via going nowhere (circled with a ?). If this is a ground via, click on it and name it GND. Also, you have no need for thermals (circled areas on a ground pin), so click on your polygon for both the front and the back and turn thermals OFF. You should also have many more stitching vias going from the top ground to the bottom. If you are sending this out for fab, they are cheap.
 

Thread Starter

eb123

Joined Jul 3, 2017
74
Here are the changes I would make:

View attachment 157308

I did this free-hand, so straighten out the traces and use proper miters. You have a tendency to cut your traces quite close to a pad. On a board like this, there is no need. It appears that you have a named via going nowhere (circled with a ?). If this is a ground via, click on it and name it GND. Also, you have no need for thermals (circled areas on a ground pin), so click on your polygon for both the front and the back and turn thermals OFF. You should also have many more stitching vias going from the top ground to the bottom. If you are sending this out for fab, they are cheap.
Thanks, I'll give that a go. I'm also going to try to route the terminating resistors more cleanly - as would be shown in a schematic.

A few things, I generally prefer to route manually. How can I set the clearance for these routes? The option only seems to be available when autorouting.

Is there a way to keep the thermals for the just the capacitor?

When it came to choosing the resistors and capacitors, I just picked ones that "looked" right. For a 120ohm resistor, and 0.1uf capacitor, which option would you recommend (surface mounted)?

Cheers.
 

SLK001

Joined Nov 29, 2011
1,548
I wouldn't use thermals anywhere - especially for the capacitor. I route manually too, and the only way to keep the trace clearance is to do it manually. Be sure to do a DRC prior to finalizing the board and let the program check that you haven't violated the minimum clearances. As for picking device footprints, first, PICK THE PART, then pick the corresponding footprint. Depending on the resistor dissipation, a 0306 (0.030" by 0.060") part is common and easily obtained and is also easy to manually place and solder.
 

Thread Starter

eb123

Joined Jul 3, 2017
74
I wouldn't use thermals anywhere - especially for the capacitor. I route manually too, and the only way to keep the trace clearance is to do it manually. Be sure to do a DRC prior to finalizing the board and let the program check that you haven't violated the minimum clearances. As for picking device footprints, first, PICK THE PART, then pick the corresponding footprint. Depending on the resistor dissipation, a 0306 (0.030" by 0.060") part is common and easily obtained and is also easy to manually place and solder.
When I say clearance, I mean the black edge on both sides of the trace. How can I alter that?
I've rerouted and changed the parameters to: Min width, 8, Min via drill, 10, Clearance, 5. Do these seem like suitable values?
I've attached an image of the new routing, what do you think?

Cheers.
 

Attachments

SLK001

Joined Nov 29, 2011
1,548
Also, how do you recommend I isolate the connector pins from the bottom ground plane?
The program does this automatically. CLEARANCE is set up in the DRC dialog. Your setting is now 5, which is probably too small. Use something like 10-15mils. In fact, all your settings are too small (I'm assuming MILS) . Use 15 as MIN WIDTH, 20 as MIN DRILL and 15 for CLEARANCE. A drill much less than 15mils usually costs more to produce.
 
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