Hello everyone,

I am Electrical engineer, graduated , and I have an interview in Samsung for a pre-silicon verification position.
What kind of questions do you think they may ask me and Is there a good site with questions and answers to practice from ?

thanks a lot

 

They probably want to get a feel for your experience with simulations aimed and determining if a design meets specifications and probably also physical and electrical design rule checks.

If you walk in when a bunch of memorized questions to canned answers from some site, they are almost certainly going to spot it and will probably not be impressed. However, if you have solid fundamental EE knowledge and problem solving skills, they will probably be more than willing to teach you everything you need to know about verification.

 

If you walk in when a bunch of memorized questions to canned answers from some site, they are almost certainly going to spot it and will probably not be impressed. However, if you have solid fundamental EE knowledge and problem solving skills, they will probably be more than willing to teach you everything you need to know about verification.

I'm not going to memorize questions but just want to practice and to be prepared as much as I can for the interview.
So if you experienced people can guide / direct me to such a site / questions I would be more than grateful.


thanks !

 

Everybody knows that college doesn't teach you skills, it teaches you tools. Nobody expects you to know the skills to make their product on the first day you show up. Your job is to show up with the tools. The interview is about seeing if you have the tools and if you can demonstrate some skill in using them while you're standing there. If you have the tools, you're trainable.

 

OK, I really understand what you guys saying. Its not that I don't have the tools or that I don't have the knowledge but I want to practice it and its not bad to practice and to be prepared before so it won't be the first time I will encounter such problems ...

 

Use the Internet to look up the company you will be visiting. Knowing what their products are is a good step.
Don't pretend you know how they build their products, but know something about which field of technology you are going to talk about.

 

Find out as much as you can about what "pre-silicon verification" entails.
It sounds like you want a good knowledge of solid-state semiconductor physics, especially regarding silicon processing.

 

Here's what I know about silicon verification. I watched a senior engineer spend the better part of a year building and tweaking and testing a model of an IC in a Cadence simulator using models provided by the chip maker. Lots of cursing and mouse chunks as he was an old school analog guy who disliked computers.

After this effort and a silicon spin it was discovered that the models were incorrect, which is why the devices would blow up when you applied the full voltage to them.

After that, the lawyers took over playing blame them for dollars.

Somewhere in there is the basics, work to known models of the pieces to be used from single devices to sub units (amps or gates, etc), build up your device, apply stimulus inputs, validate the outputs.

For an entry level position I would be looking for someone who as at least worked a couple of times with circuit simulation.

One place I worked hired an entry level EE because they needed someone with LabView experience. He got the job because he had once programmed a simple calculator in one of his classes.

 

But where do you get "known models" if the models provided by the fab are incorrect?

 

From ErnieM's comments, it sounds like you should be familiar with Spice simulation and Spice semiconductor transistor and diode models.
I believe H-Spice is the version most used by chip makers for verification, with transistor models from many foundries, so you might read up on that.

 

But where do you get "known models" if the models provided by the fab are incorrect?

I think those incorrect models are probably an anomaly, as most semiconductor fab houses are very interested in generating accurate models for their process, so that reasonably accurate simulations can be done of the chip circuit before it is fabricated.

 

I think those incorrect models are probably an anomaly, as most semiconductor fab houses are very interested in generating accurate models for their process, so that reasonably accurate simulations can be done of the chip circuit before it is fabricated.

I would expect them to be a very rare anomaly. My experience is that the device models are extremely accurate and well characterized, especially for analog and mixed signal processes. I was surprised when I first started doing IC design that the bias voltages on current mirrors was seldom more than a few millivolts away from what the simulations predicted. And that was back when you could do an engineering lot for a few tens of thousands of dollars compared to the million-plus dollars today.

 

But where do you get "known models" if the models provided by the fab are incorrect?

Obviously you get it from your lawyer cause he's the one you call in this situation.

 

Obviously you get it from your lawyer cause he's the one you call in this situation.

I guess they could try that route. ;D

One thing that most people that use these models don't realize is that, as complex as they are (the IBM 130 nm models used a 300 component subcircuit to model each transistor), they are actually pretty narrow in scope. They usually are only good over one of the main temperature ranges (which one depends on what the end products tend to be) and a lot of things, like short-reach and long-reach device matching and also orientation anisotropy are often not addressed at all, particularly in logic processes. Because of the way that the models are developed (basically parametric curve fitting to experimental data) they tended to depart reality pretty quickly once you were outside of the limits over which the models were good for. So if you want to use them outside of those limits, all bets are off. This was a particular thorn in our side because we tended to use logic processes for mixed-signal applications that ran at significantly cooled temperatures, all the way down to LN2 (though quite a few processes actually have LN2 models).