Hi Folks:

I have created a two stage CE voltage amplifer in LTSpice that I came across in the
Heathkit Transistor Circuit Design Course. Stage 1 has a voltage gain of 18, with an
input of 2.91mv peak and an output of 53mV peak.

Stage 2 attenuates the signal rather than amplifying it.

I have uploaded the LTSpice file.

When I actually breadboarded the circuit, the results were pretty much the same.

I must be missing something.

Thanks,

David

 

There's a couple issues with the second stage. The voltage divider on the input puts the base at about 11.5V, which restricts the collector voltage swing to about 4V peak to peak. If that's ok for you then don't worry about it. The other issue is that C5 attempts to give the stage a gain of about 90, or 2.27k/25 ohms (re). Since the quiescent collector voltage is so high, it can't swing that far.

How much overall gain do you want? If you can do with less gain, put a resistor in series with C5. If you're trying to maximize the gain, you need to move the base voltage down so that the quiescent emitter voltage is much lower, then make the quiescent collector voltage about half the supply.

 

See