Hi guys;
I think my lecturer is being a bit naughty.
Studying for my first tests here... He's given us a piece of VHDL and asked us to do the Truth Table and logic circuit for it.
The answer he's given is basically what looks like a flip flop waveform pattern output.... Hmmm...Well that's not a TT or a logic circuit right?
The logic is -
Y<= (not A0 and not A1 and D0) or
(A0 and not A1 and D1) or
(not A0 and A1 and D2) or
(A0 and A1 and D3);
Now I was having a think about this. Looks easy, but it's tricky... After a number of attempts at wires crossing all over the place and 32 bit truth tables etc...
I think this might be right... Maybe??? What do you think?
I think my lecturer is being a bit naughty.
Studying for my first tests here... He's given us a piece of VHDL and asked us to do the Truth Table and logic circuit for it.
The answer he's given is basically what looks like a flip flop waveform pattern output.... Hmmm...Well that's not a TT or a logic circuit right?
The logic is -
Y<= (not A0 and not A1 and D0) or
(A0 and not A1 and D1) or
(not A0 and A1 and D2) or
(A0 and A1 and D3);
Now I was having a think about this. Looks easy, but it's tricky... After a number of attempts at wires crossing all over the place and 32 bit truth tables etc...
I think this might be right... Maybe??? What do you think?
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