Trouble using Master/Slave Flip-Flops

Thread Starter

Noch50

Joined May 17, 2017
2
Hello,

I am building a 4-bit non-sequential synchronous counter using SN4027BE JK Flip-flops. I have designed the circuit in multi-sim and it works as expected. However, after I built the circuit, the output that I am getting isn't right. After spending several days on this, I am not sure what other debugging methods I should try. I am sure that my circuit logic is correct, the 555 timer I'm using to power the clock works properly, and even tried inverting the timer for some of my clocks since my IC chip is a master-slave flip flop.

Any insight or information will be greatly appreciated.
 

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WBahn

Joined Mar 31, 2012
25,545
"The output I'm getting isn't right" doesn't give us very much to go on.

What is it doing that it shouldn't?

What is it not doing that it should?

We can't even begin to tell if your schematic does what you want since you don't even tell us what sequence it is supposed to count it.

Have you made you all of your chips are properly powered and bypassed?

Are all of your chips compatible with each other?

What have you done to try to debug the circuit?
 

WBahn

Joined Mar 31, 2012
25,545
"The output I'm getting isn't right" doesn't give us very much to go on.

What is it doing that it shouldn't?

What is it not doing that it should?

We can't even begin to tell if your schematic does what you want since you don't even tell us what sequence it is supposed to count it.

Have you made you all of your chips are properly powered and bypassed?

Are all of your chips compatible with each other?

What have you done to try to debug the circuit?
 

Thread Starter

Noch50

Joined May 17, 2017
2
The circuit is supposed to light up four LED lights in the following sequence in binary:

2 - 3 - 5 - 7 - 11 - 13 - 6 - 0 - 9 - 12 - 15 - 1

However, what is being displayed is this sequence:

7 - 1 - 4 - 5 - 4 - 5 - ( continues alternating between 4 and 5 )

I am positive that that circuit logic is correct, since I've rebuilt it three times - then had a friend look it over. I am sure that the chips are compatible with each other, also the chips are all from the same manufacturer ( national instruments ).

I double checked to make sure that the chips are powered and bypassed.

Things I've done to debug the circuit:

1) rebuilt it several times to ensure logic is correct
2) grounded VSS and connected VDD to VCC ( 5V )
3) inverted the connections on #2 to test
4) grounded both VSS and VDD
4) check that the 555 timer was producing an output that alternated between 0 and 5V at 50% duty cycle
5) Inverted some of the clocks using a NOT gate
6) changing the amount of voltage supplied to the circuit from 5V to 9V
7) swapped out all the IC chips with new ones
8) triple checked for loose connections

The only other thing I can think of that could be a problem is with the JK Flip Flops im using. In multisim I used the 4027BP FF IC chips. But in my circuit, im using CD4027BE

Here is documentation on the IC chip that I'm using for my circuit: http://www.ti.com/lit/ds/symlink/cd4027b.pdf

Based on the schematic diagrams, they look like they should behave identical to each other as the schematic for both IC chips look identical.
 

WBahn

Joined Mar 31, 2012
25,545
Don't build the whole thing and then see if it works.

Build your 555 circuit and make sure it works (sounds like it is).

Us a single JKFF configured to just toggle and get that to work.

The use two JKFFs configured to go in some arbitrary sequence, say 1,0,2,3, and get that to work. If it goes in the wrong sequence, it's possible that you will discover your underlying problem right there. If it works, do the same for a three FF circuit and pick a sequence that doesn't use all the states.

Redraw your schematic so that it is more easily understood. Stack your JKFF chips vertically, perhaps with the 555 between them since it's output only has to go to the clock inputs of the FFs. I'd recommend putting the msb on the top and lsb on the bottom. Then bring their outputs back to left side and order them in vertical pairs starting with the msb and its complement and so on. Label them. Then put the logic for each FF in a block and stack the blocks vertically in the same order as the FFs.

What does your logic do for the unused states?
 

dl324

Joined Mar 30, 2015
10,462
When I'm designing counters, I usually use this format:
upload_2017-5-18_8-17-49.png
It's a 3 bit binary/gray, up/down counter.

I worry about beautification after it works.
 

WBahn

Joined Mar 31, 2012
25,545
I worry about beautification after it works.
Yes and no. Final beautification can certain wait. But if your schematic is an unholy mess then you are likely to make a mistake that you can't spot even though, with decent organization, it is glaringly obvious. You also have a harder time transferring it from the schematic to breadboard and you have a much harder time troubleshooting it. In this case here, another huge factor is the loss of ability to communicate your ideas to people that you are asking free help from -- few such people are going to bother wading though a messy schematic.
 

WBahn

Joined Mar 31, 2012
25,545
When I'm designing counters, I usually use this format:
Note that this is almost exactly the layout I recommended. The only difference is that you put the lsb on the top. The result is that you have to cross the wires when hooking them up to the seven segment display decoder. If you put the msb on the top then the routing is cleaner. It's a minor point and if you really like having the msb on top then the slight improvement in cleanliness might not be worth it.
 

dl324

Joined Mar 30, 2015
10,462
The result is that you have to cross the wires when hooking them up to the seven segment display decoder. If you put the msb on the top then the routing is cleaner.
In the simulator I'm using, it's difficult to move gates with wires attached, so I choose to start with LSB at the top and space the flip flops based on the gating logic.

The wire crossings on the hex decoder didn't bother me until you mentioned it. It's a custom component I created and I'll just create another one with the inputs reversed...
 

WBahn

Joined Mar 31, 2012
25,545
In the simulator I'm using, it's difficult to move gates with wires attached, so I choose to start with LSB at the top and space the flip flops based on the gating logic.

The wire crossings on the hex decoder didn't bother me until you mentioned it. It's a custom component I created and I'll just create another one with the inputs reversed...
Isn't that typical? We live with something in complete satisfaction until someone points something out, and then we can't live with it any more. Been there, done that.

Before you make that new component, consider that we naturally (well, not 'naturally', but we've become accustomed to) think of the msb being on the left and the lsb being on the right. Notice that that's how you organized your vertical longlines on the left. So if you reverse them on your decoder there will be a mismatch that, sooner or later, will likely cause you grief.
 

dl324

Joined Mar 30, 2015
10,462
few such people are going to bother wading though a messy schematic
Early in my career as a technician, I read databooks, studied circuits, and made mental notes of available functionality. I emulated drawing styles that resonated with me.

This is a counter schematic from TI:
upload_2017-5-18_10-4-59.png
I knew a guy who used to draw schematics for databooks back in the 80's when they drew them by hand in ink using rulers and logic templates. We're spoiled now...
 

dl324

Joined Mar 30, 2015
10,462
The circuit is supposed to light up four LED lights in the following sequence in binary:

2 - 3 - 5 - 7 - 11 - 13 - 6 - 0 - 9 - 12 - 15 - 1

However, what is being displayed is this sequence:

7 - 1 - 4 - 5 - 4 - 5 - ( continues alternating between 4 and 5 )
You should start with why when the count is 7 it doesn't go to 11. Single cycle/stop the clock at 7 and check the inputs to the flip flops to find out why they're not correct. It could be a wiring problem, or a logic problem.
 
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