Updated schematic with components for your application.

ak

 

Updated schematic with components for your application.

ak

View attachment 302058

You are a true legend
Thank you so much
(I really need to brush up my electronics)

 

The main advantage of my XOR circuit over AK's is that the XOR uses only one RC for both pulse widths.

 

Yeah, I know. I have a variation that does that, but it still has more passives than yours. I think there was something in the original thread that made me go with unequal pulse widths, but that data has fogged.

ak

 

Yeah, I know. I think there was something in the original thread that made me go with unequal pulse widths, but that data has fogged.

ak

I have components on the way. I will give both a go on the board

thank you both

 

Updated schematic with components for your application.

ak

View attachment 302058

i have everything on a breadboard. incl the 4n35. when i power up the output on 4 is high.
when i close SW1 output 4 lowers from 4.9V to 3.6V
am i missing something?
i have used 100nF ceramic capacitors.
any insights gentlemen?

 

output 4 lowers from 4.9V to 3.6V

Every component and pin on the schematic has a unique identifier. By "output 4", do you mean U1B pin 4, U2 pin 4, or something else?

ak

 

Also, separate from your voltage values, two things:

1. The pulse width is only 10 ms, which will not register correctly, if at all, on most meters. You might be able to see an LED blink, but it will be dim.

2. Schematic error. The schematic was originally configured to drive an output transistor that drove whatever downstream. For driving an optocoupler directly as shown, the logic polarity at U1Bpin4 is incorrect. There are several ways to fix this.

One is to add a driver transistor such as the 2N7000 in post #7. Another is to rearrange the output section so the gate drives the optocoupler correctly. A possible issue here is that the standard CD4093 has a fairly weak output stage. This leads to a third option, changing to a 74AC132. This is another quad NAND gate with Schmitt Trigger inputs, but its output stage can source and sink 24 mA. In CMOS-land that's a lot, and way more than what is needed to drive an opto. A minor issue is that the pinout is different from the 4093. I do not know what genius made that call.

Note that if you change the crutschow #7 schematic to use the 74AC132, it also does not need an output transistor to drive an optocoupler.

ak

 

Also, separate from your voltage values, two things:

1. The pulse width is only 10 ms, which will not register correctly, if at all, on most meters. You might be able to see an LED blink, but it will be dim.

2. Schematic error. The schematic was originally configured to drive an output transistor that drove whatever downstream. For driving an optocoupler directly as shown, the logic polarity at U1Bpin4 is incorrect. There are several ways to fix this.

One is to add a driver transistor such as the 2N7000 in post #7. Another is to rearrange the output section so the gate drives the optocoupler correctly. A possible issue here is that the standard CD4093 has a fairly weak output stage. This leads to a third option, changing to a 74AC132. This is another quad NAND gate with Schmitt Trigger inputs, but its output stage can source and sink 24 mA. In CMOS-land that's a lot, and way more than what is needed to drive an opto. A minor issue is that the pinout is different from the 4093. I do not know what genius made that call.

Note that if you change the crutschow #7 schematic to use the 74AC132, it also does not need an output transistor to drive an optocoupler.

ak

I will add a transistor to the output on pin 4. The 10ms pulse should be enough.
So far the 4n35 has proven to be a solution for the initial problem. Even without the second pulse.
i do have another device that needs this circuit so i will continue to try make it work.
So far thank you for your help