Timing diagram problem with propagation delays?

Thread Starter

Gonzalo Armbrust

Joined Jun 28, 2015
I want some feedback to see if I completed the timing diagram for this problem correctly. Each gate in the circuit above the diagram has a 5 ns propagation delay, I have outlined my work in pen to make it a little easier to read ( work is in attached document)

initially w = x = y is equal to zero, i'm asked to find what V and Z would be after the changes at the corresponding nanoseconds