I would like to simulate the switching of this gate drive.
I am not very familiar with the operation of the bootstrap circuit etc. but I would like to do just a couple of simulations at least to verify that the SW output is consistent with what is stated in the datasheet (look to the right in the schematic image the "table" taken from the datasheet).

The problem is the too small timestep on node nn3 (i.e. HS pin)
I have tried varying/removing each individual component but the problem persists.
I have also tried varying these parameters, but it does not work:

I have attached the simulation and the library from which I auto-generated the gate driver.
I am not very familiar with the operation of the bootstrap circuit etc. but I would like to do just a couple of simulations at least to verify that the SW output is consistent with what is stated in the datasheet (look to the right in the schematic image the "table" taken from the datasheet).

The problem is the too small timestep on node nn3 (i.e. HS pin)
I have tried varying/removing each individual component but the problem persists.
I have also tried varying these parameters, but it does not work:

I have attached the simulation and the library from which I auto-generated the gate driver.
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