We wish to synthesize a modulo 8 synchronous counter based on a flip-flop
D. We propose to use D flip-flops with a rising edge. The \( Q_2, Q_1 and Q_0 \) outputs of
D flip-flops have weights 4, 2 and 1 respectively.
I dont understand how can i conceptualize such circuitry or how would it work using the D-FF, any explanations please?

 

Hi salhi,
Are you able to create and post simple circuit of the proposed sync counter?

Then we can guide you.
E

 

Hi salhi,
Are you able to create and post simple circuit of the proposed sync counter?

Then we can guide you.
E

thank you so much, well the professor proposed us this scheme but its for us to manipulate it to make it count till 8 (is this what counter mod 8 mean right?)

 

(is this what counter mod 8 mean right?)

Hi,
A mod-8 counter stores an integer value, and increments that value (say) on each clock tick, and wraps around to 0 if the previous stored value was 7.

Post your version of a MOD 8 synchronous counter

E

 

Hi,
A mod-8 counter stores an integer value, and increments that value (say) on each clock tick, and wraps around to 0 if the previous stored value was 7.

Post your version of a MOD 8 synchronous counter

E

Ah okey i understand what a mod-8 mean from a concept-pov, but from a circuit design -pov im unable to implement one, thats why im asking on how to use the 3 D-FF to make something like that

 

Hi sal,
Check out this video.

E

 

When did they start teaching students to label things backwards? 'A' was always LSB when I was in school and that's the convention that companies like Texas Instruments, Motorola, and RCA used.

From the 1981 TI databook:

I don't care for the unnecessary wire jogs. They drew them by hand in those days, so were less inclined to beautify schematics. Aside from that, it's a decent schematic.

The naming convention conforms to Motorola's BCD to 7 segment decoders:


It carried over to CMOS. From RCA's 1975 CMOS databook:


And the woman's style is awful. She should have copied TI's.

 

Without any gates to examine the current state of the counter you cannot make the D-flip-flops behave the way you need them to behave. What you proposed in post #3 is a shift register, not a counter.

 

im unable to implement one, thats why im asking on how to use the 3 D-FF to make something like that

Do the terms truth table, excitation table, Karnaugh maps ring any bells? You have to have been through some designs before your instructor would assign problems.

 

Do the terms truth table, excitation table, Karnaugh maps ring any bells? You have to have been through some designs before your instructor would assign problems.

Our professor's son died we havent seen him for 2 months , only his previous assistant been giving us the coursework through classroom, so all this stuff is personnal effort from me and from you people; i love how most people i found here arent high-egoist like EE SE

 

Without any gates to examine the current state of the counter you cannot make the D-flip-flops behave the way you need them to behave. What you proposed in post #3 is a shift register, not a counter.

yeah dont worry the video sent by our dear moderator was more than enough , infinite thanks: