I need to design a ckt for the following matlab code....The code tries to numerically solve the equation
y'' + 3xy' + 3y = 0
Here, u is assumed to represent dy/dx or y'. dx is approximated as x1 - x. Similarly, dy = y1 - y and du = u1 - u. The value 'a' provides the number of times the numerical loop is executed. u1, x1 and y1 represent the new values of u, x and y. Thus, x1 = x + dx, y1 = udx + y, u1 = u - 3xudx - 3ydx. The ckt executes by loading the initial values of x, y, u, dx, and a.
code
clc;
clear all;
close all;
x=input('enter x');
y=input('enter y');
u=input('enter u');
dx=input('enter dx');
a=input('enter numerical iterations');
while x < a,
u=u-3*x*u*dx-3*y*dx;
y = y + u*dx;
x = x + dx;
end
xfinal=x
yfinal=y
Ufinal=u
Specifications to be me :t
1> The maximum size of inputs should be integers of size 32 bits
2> use of clock signal should be avoided if possible
Help required:
1>when i design the circuit, i am unable to sequence the events to occur one after the other. Kindly advice.
2>Too many registers and flip-flops are used... I need to optimize them.. If anybody could post the general logic diagram even that would be fine.
Thnxs in advance
y'' + 3xy' + 3y = 0
Here, u is assumed to represent dy/dx or y'. dx is approximated as x1 - x. Similarly, dy = y1 - y and du = u1 - u. The value 'a' provides the number of times the numerical loop is executed. u1, x1 and y1 represent the new values of u, x and y. Thus, x1 = x + dx, y1 = udx + y, u1 = u - 3xudx - 3ydx. The ckt executes by loading the initial values of x, y, u, dx, and a.
code
clc;
clear all;
close all;
x=input('enter x');
y=input('enter y');
u=input('enter u');
dx=input('enter dx');
a=input('enter numerical iterations');
while x < a,
u=u-3*x*u*dx-3*y*dx;
y = y + u*dx;
x = x + dx;
end
xfinal=x
yfinal=y
Ufinal=u
Specifications to be me :t
1> The maximum size of inputs should be integers of size 32 bits
2> use of clock signal should be avoided if possible
Help required:
1>when i design the circuit, i am unable to sequence the events to occur one after the other. Kindly advice.
2>Too many registers and flip-flops are used... I need to optimize them.. If anybody could post the general logic diagram even that would be fine.
Thnxs in advance