Simple yet fast FPGA dev board recommendation

Thread Starter

Halfbackstrat

Joined Jan 9, 2020
10
I'm looking for a recommendation of an fpga development board which is simple but runs at quite a high speed.

I have a datastream at 50 MHz but I won't process this data in the FPGA. I just need to be able to switch on and off TTL pulses to start and stop the device which produces this data with 50MHz precision.
I'm not tied to any particular fpga manufacturer but keeping the costs down would be nice so if it was programmable with the free version of Quartus and ISE that would be fantastic.

I'd also benefit from it being relatively recent so that it will be compatible with Windows 10.

I have an Intel/Altera MAX V CPLD dev board in my lab but trying to get the drivers running on W10 is nightmarish and, unfortunately, it doesn't seem to support Linux.
 

Analog Ground

Joined Apr 24, 2019
305
Terasic makes lots of high quality dev boards available from Digikey. Here is the Max 10 page. The DE10-Lite, for example, has a built in USB-Blaster. So, install Quartus, plug it in and go for it. There are two 50 MHz clocks into the Max 10. There is a warning in the user manual to not change the clock circuitry settings. So, you may want to look into it in more detail to see if you can get the 50 MHz output you want. Also, what is the effect of changing the clock generator. Maybe it just breaks some of the peripherals in the board which you may not care about. I have a DE-10 Lite I am about to fire up but cannot give you any testimonials yet.

https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=13&List=Simple#Category218

Edit: BTW, the internal PLL clock generator can produce clocks over 400 MHz (C7 speed grade on the DE-10). I would hope this is fast enough for your 50MHz control/generator.
 
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Thread Starter

Halfbackstrat

Joined Jan 9, 2020
10
Thanks for that recommendation! That looks pretty perfect. I'd been looking at the MAX 10 evaluation kit (https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-max-10-evaluation.html) but it doesn't come with a USB Blaster as far as I can tell. I'd probably want to get the system working before I buy a separate USB Blaster cable

I'm not familiar with how these PLL clock generators work but I'll have to do some reading as that sounds crucial to getting this to work.

How are you getting on with your DE-10 Lite?
 

Analog Ground

Joined Apr 24, 2019
305
Thanks for that recommendation! That looks pretty perfect. I'd been looking at the MAX 10 evaluation kit (https://www.intel.com/content/www/us/en/programmable/products/boards_and_kits/dev-kits/altera/kit-max-10-evaluation.html) but it doesn't come with a USB Blaster as far as I can tell. I'd probably want to get the system working before I buy a separate USB Blaster cable

I'm not familiar with how these PLL clock generators work but I'll have to do some reading as that sounds crucial to getting this to work.

How are you getting on with your DE-10 Lite?
You are correct that the dev board in you link does not have a built-in Blaster. The PLL clock generator(s) can take the 50 MHz external clock and create other frequencies. For example, to create the 50Mhz waveform you mention, you may want to start with at least 100 MHz. So, the PLL would multiply the external clock by 2.

I have a DE-10 Lite in front of me now but have not fired it up. Hopefully this week. The board is part of the Intel Univeriity program and I see there is a "control panel" for the board, in addition to Quartus. I am guessing this extra layer may make it friendlier for someone just starting out but just a guess. Ask me in a week or so.
 

Thread Starter

Halfbackstrat

Joined Jan 9, 2020
10
You are correct that the dev board in you link does not have a built-in Blaster. The PLL clock generator(s) can take the 50 MHz external clock and create other frequencies. For example, to create the 50Mhz waveform you mention, you may want to start with at least 100 MHz. So, the PLL would multiply the external clock by 2.

I have a DE-10 Lite in front of me now but have not fired it up. Hopefully this week. The board is part of the Intel Univeriity program and I see there is a "control panel" for the board, in addition to Quartus. I am guessing this extra layer may make it friendlier for someone just starting out but just a guess. Ask me in a week or so.
I've done a bit of reading on using the PLLs for synthesising higher frequency waveforms. This would be very important for more precise control over the delivery of output signals to trigger devices. But am I correct in thinking that the bits of code that deal with checking for some an action would still only be "checked" at 50MHz?
(e.g. a TTL from a line driven photodiode to some input pin labelled "flashTrigger" with some pseudocode like" on posedge (flash trigger) wait 20 clock ticks and apply voltage to output pin").

This is not necessarily a problem, looking to find a maximum value for the input clock frequency atm.

Edit: Max input clock frequency is 472.5 MHz which would also be more than ample. I can trial this at 50 MHz and work out a backup with a PLL frequency multiplication and then potentially just run a higher external clock speed when I deploy this on a PCB (or fall back on the 50 MHz with PLL solution).
 

Analog Ground

Joined Apr 24, 2019
305
. But am I correct in thinking that the bits of code that deal with checking for some an action would still only be "checked" at 50MHz?
(e.g. a TTL from a line driven photodiode to some input pin labelled "flashTrigger" with some pseudocode like" on posedge (flash trigger) wait 20 clock ticks and apply voltage to output pin").

This is not necessarily a problem, looking to find a maximum value for the input clock frequency atm.

Edit: Max input clock frequency is 472.5 MHz which would also be more than ample. I can trial this at 50 MHz and work out a backup with a PLL frequency multiplication and then potentially just run a higher external clock speed when I deploy this on a PCB (or fall back on the 50 MHz with PLL solution).
The clock out of the PLL is distributed as a regular clock available for any logic. For example, the external clock would be 50 MHz into the PLL but the main clock available internally could be the PLL output of, for example, 100 MHz or 200 MHz. There is no restriction on the use of the PLL output other than the logic being fast enough to operate at that frequency.

In general, you don't use super fast external clocks like you mention (of 472 MHz). More commonly, use a slower clock and use the PLL to generate a faster clock internally.
 
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