I know this typically depends on if its ttl or CMOS
But to simplify the question, is there anything wrong with putting a pull down on a cmos chip?
I know its needed on a ttyl part but if you use one on cmos is it bad?
Also, what is a good value for a pulldown for say a 4-5V part.
100k?
say you have a simple or / and gate
Is there any badness from putting pulldowns on both the inputs and the outputs if the output is driving say a bjt?
But to simplify the question, is there anything wrong with putting a pull down on a cmos chip?
I know its needed on a ttyl part but if you use one on cmos is it bad?
Also, what is a good value for a pulldown for say a 4-5V part.
100k?
say you have a simple or / and gate
Is there any badness from putting pulldowns on both the inputs and the outputs if the output is driving say a bjt?