How to connect my K0 input???

 

Welcome to AAC!

Is this homework?

Since K0 is always 0, where do you think it should be connected?

 

GND, but my G0 is always 1 can i use that,
and how i would connect K0 in other situation when is 0

 

GND, but my G0 is always 1 can i use that,
and how i would connect K0 in other situation when is 0

What is G0? If it is always 1 and you need something that is always 0, what do you think the answer is?

How are you building this? Physically, or in some logic simulator, or in an FPGA, or what?

 

GND, but my G0 is always 1 can i use that,
and how i would connect K0 in other situation when is 0

You're skipping a step here. You need to generate the full table and use Kmaps to get the correct expressions.

Is this homework?

 

How to connect my K0 input???

What chip is this?

 

What chip is this?

It would appear to be four J-K flip flops.

 

It would appear to be four J-K flip flops.

Connected how?
Q0 does nothing. Q1, Q2 and Q3 appear to be a counter. J and K inputs make no sense that I can see.

 

We don't know what the problem is that led to this state transition table -- it could me nothing more than a four-bit1 counter that walks through the odd numbers and repeats.

I haven't checked every entry, but I've spot checked quite a few and haven't found any wrong yet.

If we look at the second row, it has all four possible transitions.

0 -> 0 JK = 0X
0 -> 1 JK = 1X
1 -> 0 JK = X1
1 -> 1 JK = X0

Do have a specific row that doesn't make sense?

 

I checked all of the rows and they're correct.

 

Thanks, I understand.

 

Thanks, I understand.

Did you generate the equations to implement the counter?

 

Because my J1 is equal 1, a take that 1 and inverted, and connect to K0.

 

Can you post your schematic?

 

Because my J1 is equal 1, a take that 1 and inverted, and connect to K0.

Based on your tables, J1 isn't always equal to 1. You have several don't cares for J1, so what J1 actually is for those cases is dictated by the specific (and so far unspecified) way you implement the logic to get the values for J1 that you DO care about. If you are going to rely on J1 always being 1 so that you can generate K0 from it, then you no longer have any don't-care entries for J1 because you very much DO care about every single one of them. Update your tables accordingly. If you don't, then you run the very real risk of grouping terms to minimize your logic and leaving out one of those x's that really should have been a 1.

 

Because my J1 is equal 1, a take that 1 and inverted, and connect to K0.

Why wouldn't you just connect K0 to GND? Or since Q0 is always 1, connect it to Q0'?

It will be easier for you and us if you show a fully populated table and the associated Kmaps.

 

Why wouldn't you just connect K0 to GND? Or since Q0 is always 1, connect it to Q0'?

That's why I asked how this was being implemented way back Post #4. The original question sounds like the TS doesn't know HOW to connect K0 to GND. But without know how this is being implemented, it is impossible to tell him how to do it. Every simulator or synthesis tool has SOME way to tie a logic signal hard HI or hard LO, but HOW that is done varies from tool to tool.

 

That's why I asked how this was being implemented way back Post #4.

This thread *is* progressing at an unusually glacial pace... And the OP has selecting reading (or answering)...

 

This thread *is* progressing at an unusually glacial pace... And the OP has selecting reading (or answering)...

Not unusual, unfortunately. But the OP does seem to be making the effort (in this and elsewhere). I think there is a pretty strong language barrier that he is dealing with.