you need to design a sinchronous sequential circuit that has one input i1,one out put o2,reset signal r and a clock cycle Clk.The out put becomes 1 after the completition of the input sequence xxxxxx. The circuit should be implemented using Dffs with reset signal (DFFR).The reset signal r should be connected to the reset input of the D flip-flops in order to initialize them.
The circuit should be of Moor type,which means that the current output should not depend on the current input.In fact,with in the completion of the sequence there has to be a new state with output 1,and from there it should proceed to the other states without losing any input data.
For this overlap sequence detector 000111 I need help only for state diagram and output sequence
thank you
The circuit should be of Moor type,which means that the current output should not depend on the current input.In fact,with in the completion of the sequence there has to be a new state with output 1,and from there it should proceed to the other states without losing any input data.
For this overlap sequence detector 000111 I need help only for state diagram and output sequence
thank you