RISC Pipeline with more than 5 states

Thread Starter

AlexMak

Joined Jan 2, 2018
32
Hello, I got an example of a pipeline with 5 states ( fetch, decode, read operand, execute, write ) but my question is what states could I possible add/repeat so I can make a pipeline with 7-9 states?
 

MrChips

Joined Oct 2, 2009
19,270
What is your understanding of pipelining?

What stages in the pipeline can be started while the other stages are still being performed?
 

Thread Starter

AlexMak

Joined Jan 2, 2018
32
Well they are dependent on each other so you can't start multiple stages at once? Or am I not understanding your question?
 

Thread Starter

AlexMak

Joined Jan 2, 2018
32
  1. Instruction Fetch (First Half)
  2. Instruction Fetch (Second Half)
  3. Register Fetch
  4. Instruction Execute
  5. Data Cache Access (First Half)
  6. Data Cache Access (Second Half)
  7. Tag Check
  8. Write Back
What is the register fetch here ? And why is the execute before reading the operands? What is the 2nd fetch for ? Is there some place where these things are explained ?
 
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