RF/voltage clamp/limiter

Thread Starter

Tako

Joined Oct 21, 2014
65
Hi,

I'm looking for a circuit that is called "RF clamp", "RF limiter", "voltage clamp" or "voltage limiter".
The example of such circuit is a transistor Q on this picture:

http://i.stack.imgur.com/j8EGx.jpg

However, what I need is a full RF clamp circuit. Not only the transistor shown in the example above. The gate bias of this transistor would be very useful.

I cannot find many of such circuits. Often, they are stacked diodes on antenna lines or diodes + resistor to bias transistor clamp.

Do you know where I could find good examples? Any books, websites?
 

BR-549

Joined Sep 22, 2013
4,938
It would be hard to say. Not quite sure what you mean. The Q in your example is not a clamp, it's a switch.
And not sure what is meant by full rf clamp, unless you mean grounding or disconnecting the antenna.
 
Last edited:

Thread Starter

Tako

Joined Oct 21, 2014
65
@BR-549
Could you please, say what you do not understand, so I could explain a bit more?

Maybe this picture would be better: https://www.google.pl/imgres?imgurl=x-raw-image:///f4c1e3144cdc3e98e4363d638d6c17d10b2a5f2caf9eccef62d63f8037c7ba39&imgrefurl=http://75.127.14.226/downloads/ims/arftg_imsproceedings/ims_proceedings/PDF/124:shock:L7DaCQtLrCf-2.pdf&docid=ck0fkoNyabWGGM&tbnid=mD7cTBTjwfSQZM:&w=526&h=296&bih=799&biw=1440&ved=0ahUKEwiB_-zH9P_NAhXCd5oKHQONBbkQMwgiKAQwBA&iact=mrc&uact=8

I need a schematic of RF clamp circuit to be implemented in CMOS IC process.


@Kermit2
I do not need separate element or IC XD.
I must implement such RF clamp in my CMOS IC process.
 

BR-549

Joined Sep 22, 2013
4,938
Are you working with a already manufactured chip, or are you designing a new chip?

Do you know what a data sheet is? What is a CMOS IC process?

And, the part of the circuit that you want to limit, is that part of the circuit, used for transmission also?

We can't offer solutions, without understanding what you are doing. All the little details, makes ALL the difference.

So, how do you want to proceed?
 

Thread Starter

Tako

Joined Oct 21, 2014
65
I see. I was not aware that I was not clear in my description.

Details are as follows:

1. I'm designing a new chip.

2. CMOS IC process: 0.18 um 3.3 / 1.8 V.

3. Yes, the clamp should be on antenna lines that are both used to receive power from RF 13.56 MHz field and to transmit data.
 

BR-549

Joined Sep 22, 2013
4,938
Tako, I was suspecting that. Sorry my friend, 0.18 um is out of my league. The closest I get to a chip is the datasheet.

I believe there are members on here that design chips, but have not seen it discussed.

Good luck on your quest.
 
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