Reset switch of CD4017 counter doesn't work properly on my circuit, why?

Thread Starter

nornandxor

Joined Dec 11, 2017
148
Hi,
Below is the circuit that where I have the cd4017 counters and the Reset switch connected to the GND through a resistor. The issue is it doesn't work on my breadboard unless I remove the Resistor and just short the wire directly to the GND, at that time the Reset switch works!!!
I tried a variety of different resistors ranging between 150 ohm to 1 Million ohm and none of them worked!
Any idea why this happens!
wq.JPG
 

Thread Starter

nornandxor

Joined Dec 11, 2017
148
Do I really need to add a Resistor there if the Reset switch works without it? I had the Resistor there because thats what I keep seeing on other similar circuits online! Is it because the counters I'm using are SMD's or it doesn't matter?
 

Sensacell

Joined Jun 19, 2012
2,452
You need a resistor.

Did you check the voltage on the reset pin?

Check it with both switch open and closed- post your findings.
 

ScottWang

Joined Aug 23, 2012
6,834
R1 = 4.7K(or 5.1K) for +5Vcc,
R1 = 10K(or 9.1K) for +9Vcc,
R1 = 12K for +12Vcc.

Please measures the Reset Switch to make sure that it is works fine and also check two wires which connected to the Reset Switch.

Please measures the voltage of the pin 15(MR) when the Reset Switch is pressed and before you press it.
 

Thread Starter

nornandxor

Joined Dec 11, 2017
148
R1 = 4.7K(or 5.1K) for +5Vcc,
R1 = 10K(or 9.1K) for +9Vcc,
R1 = 12K for +12Vcc.

Please measures the Reset Switch to make sure that it is works fine and also check two wires which connected to the Reset Switch.

Please measures the voltage of the pin 15(MR) when the Reset Switch is pressed and before you press it.
You need a resistor.

Did you check the voltage on the reset pin?

Check it with both switch open and closed- post your findings.
Thank you guys for the help! I will do the measurements and update you with the results.
 

Thread Starter

nornandxor

Joined Dec 11, 2017
148
You have a mechanical switch = switch bounce = violate timing
on the reset pin. Best if switch debounced.

https://pubweb.eng.utah.edu/~cs5780/debouncing.pdf

https://www.maximintegrated.com/en/app-notes/index.mvp/id/287

Regards, Dana.
Thanks Dana,
I appreciate your insight but I dont have enough time to go through prolonged articles! Thats why we have our lovely allaboutcircuit, the best quick problem solving tool ;)
Also, I already have a solution for the bouncing issue, I paralleled the switch with a capacitor and thats it!
Thanks again and please keep me updated with your thoughts and insights because I truely believe that you guys are the best compared to all other online forums and other websites! ;)
 
Last edited:

AnalogKid

Joined Aug 1, 2013
8,150
I don't think this is the problem, but you should add decoupling capacitors to each IC. 0.1 uF to 1.0 uF, preferably ceramic, from pin 8 to 16 with the shortest possible leads.

Unless you are counting an input in the kilohertz frequency range or higher, bounce on the reset input will have no effect on the operation of the counter.

What is the input signal? Frequency, pulse width, etc?

ak
 

crutschow

Joined Mar 14, 2008
23,527
CD4017 timing restrictions -

View attachment 156091

and

View attachment 156092

Irrespective of frequency....

Regards, Dana.
Even if the switch bounce violates any of those switching parameters, that input is level sensitive not edge sensitive, and the final DC value of the switch will be the logic level that the IC will respond to at the end of the bounces.
Bouncing of the reset signal is not his problem.
 

danadak

Joined Mar 10, 2018
3,625
Neither sure nor unsure, did not design the 4017. So best advice is adhere to data
sheet specs and best practices ? Runt and ill formed logic pulses not best practice.

Regards, Dana.
 

Thread Starter

nornandxor

Joined Dec 11, 2017
148
Neither sure nor unsure, did not design the 4017. So best advice is adhere to data
sheet specs and best practices ? Runt and ill formed logic pulses not best practice.

Regards, Dana.
You need a resistor.

Did you check the voltage on the reset pin?

Check it with both switch open and closed- post your findings.
R1 = 4.7K(or 5.1K) for +5Vcc,
R1 = 10K(or 9.1K) for +9Vcc,
R1 = 12K for +12Vcc.

Please measures the Reset Switch to make sure that it is works fine and also check two wires which connected to the Reset Switch.

Please measures the voltage of the pin 15(MR) when the Reset Switch is pressed and before you press it.
I don't think this is the problem, but you should add decoupling capacitors to each IC. 0.1 uF to 1.0 uF, preferably ceramic, from pin 8 to 16 with the shortest possible leads.

Unless you are counting an input in the kilohertz frequency range or higher, bounce on the reset input will have no effect on the operation of the counter.

What is the input signal? Frequency, pulse width, etc?

ak
Even if the switch bounce violates any of those switching parameters, that input is level sensitive not edge sensitive, and the final DC value of the switch will be the logic level that the IC will respond to at the end of the bounces.
Bouncing of the reset signal is not his problem.
Some updates:
- I couldn't get any measurements from Pin 15 (on both IC's), it just showed me 0mV, though circuit's output seems fine.
- Again, Reset switch works only when resistor value is either 0 or a few ohms.
 

ScottWang

Joined Aug 23, 2012
6,834
Some updates:
- I couldn't get any measurements from Pin 15 (on both IC's), it just showed me 0mV, though circuit's output seems fine.
- Again, Reset switch works only when resistor value is either 0 or a few ohms.
So now you have to use Ohm meter to measure all the wiring about the Reset Switch, R1, MR(pin 15), and to make sure that the Reset Switch itself is fine.
 

Thread Starter

nornandxor

Joined Dec 11, 2017
148
So now you have to use Ohm meter to measure all the wiring about the Reset Switch, R1, MR(pin 15), and to make sure that the Reset Switch itself is fine.
I changed the Reset switch, but I will start checking the wiring again, though I did many times!
 

crutschow

Joined Mar 14, 2008
23,527
Neither sure nor unsure, did not design the 4017. So best advice is adhere to data
sheet specs and best practices ? Runt and ill formed logic pulses not best practice.
If you read you referenced material you will see that metastability occurs in clocked circuits when an input data change to a latch occurs near a clock edge, and the bistable circuit goes into a metastable condition. However, it eventually goes into one of its two stable states..

So a ratty signal to a DC latch set/reset input could theoretically cause a momentary metastable state but it has to eventually go to the commanded state. A latch cannot indefinitely stay in the metastable condition or stay in an illegal state.
You are worrying about an issue that does not apply here.
 
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