# question to comlimentary oscillator

#### xljin2014

Joined Nov 11, 2014
120

this is a complimentary oscillator. look at point 2,which is base of Q2,assume there is positive voltage noise signal,then point 3will go down. then through C1,point 4will go down, then Q1 current through emitter to collector will go up, this makes point2go up, so this is a positive feedback, so it is also a positive feedback.
conversly,if point 2has a negative voltage noise, it can have a negative voltage feedback,which means a positive feedback.
so the question comes:what will be choosed to determine voltage point 2,so of point3,C1 right hand?

#### Alec_t

Joined Sep 17, 2013
14,005
what will be choosed to determine voltage point 2
The value of Vcc.
Assuming Q1 and Q2 saturate when they switch fully on (which they should with the component values shown) they each drop little voltage in that state. They also pass little current when fully off. So nodes 2 and 3 both switch between Vcc and ground (but in anti-phase).

#### xljin2014

Joined Nov 11, 2014
120
So nodes 2 and 3 both switch between Vcc and ground (but in anti-phase).
node 2 is pinched to 0.7V by base - emitter pn junction, so can't go to vcc.

#### Alec_t

Joined Sep 17, 2013
14,005
Correct. I was thinking of node 1. You might want to have a pull-down resistor from node 2 to ground to ensure Q2 isn't partly turned on by any leakage current or noise.

#### xljin2014

Joined Nov 11, 2014
120
You might want to have a pull-down resistor from node 2 to ground to ensure Q2 isn't partly turned on by any leakage current or noise.
thx.but I think the posative feedback route will make Q2 turn on or off: first, assume there is high voltage noise on point 2. then point 3will go down, so V6will go down, so does V4, so Q1current will go up, so V2go up.
vice versa. the added resistor to point 2to ground seems can't prevent this.
for simulation, with resistor to 2and ground, there is still oscillation

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#### xljin2014

Joined Nov 11, 2014
120
I would like to make myself more clear here: from simulation, we see there are constant currents flow through Q1 andQ2 at first. V3 and V6 can be considered constant too. then V3 goes up. what puzzled me is why V3 goes up but not down? since noise voltage of point 2 is random? and how to determine the time when V3 starts to go up?
thx.

#### Danko

Joined Nov 22, 2017
1,771
I would like to make myself more clear here: from simulation, we see there are constant currents flow through Q1 andQ2 at first. V3 and V6 can be considered constant too. then V3 goes up. what puzzled me is why V3 goes up but not down? since noise voltage of point 2 is random? and how to determine the time when V3 starts to go up?
1. When V1 starts ON, then positive pulse through Q1 capacitance goes to Q2 base and initiates out pulse.
Capacitor C1 absorbs capacitive pulse, therefore generation of out pulse is going by "right" scenario.
2. Resistor R1 limits base currents of Q1 and Q2.
3. Q1 needs to be in active mode, so R2 should have high resistance.
4. Diode D1 prevents transition B-E of Q1 from breakdown, when voltage of V1 is more than 5V.
5. Pay attention to polarity of electrolytic capacitor (negative pin should be connected to collector Q2)!

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Every time, when V(Control,Emitter) increases up to -703 mV (point A), Q1 and Q2 instantly becomes ON.
When V(Control,Emitter) decreases by up to -1.18 V (point B), Q1 and Q2 instantly becomes OFF.
So circuit works like Schmitt trigger:

BTW,
as you approach points A or B, the overall gain increases, and at points A and B the overall gain reaches 1.

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#### xljin2014

Joined Nov 11, 2014
120
1. When V1 starts ON, then positive pulse through Q1 capacitance goes to Q2 base and initiates out pulse.
Capacitor C1 absorbs capacitive pulse, therefore out pulse generation is going by "right" scenario.
2. Resistor R1 limits base currents of Q1 and Q2.
3. Q1 needs to be in active mode, so R2 should have high resistance.
4. Diode D1 prevents B-E transition of Q1 from breakdown, when voltage of V1 is more than 5V.
5. Pay attention to polarity of electrolytic capacitor (negative pin should be connected to collector Q2)!

View attachment 302879____View attachment 302878
well done!