So I have to switch 15vdc 200mA Max load a few times a minute with ttl level signal from 16f84 mcu but I don't want to hassle with switch device in ground path cuz of complexities with type of load. I also need switch input to be ground referenced cuz using charge pump or like that for simple purpose is lame! BTW I know mosfet and igbt are better for low speed application cuz of negligible gate current and usually better saturated conduction but I don't have p.channel mosfet and I want to get project finished now which means with parts on hand! So the circuit I set up is common emitter npn with base connected to mcu io pin through limiting resistor of 10k and collector of npn to base of a pnp through resistor. The pnp has emitter connected to 15v rail and collector connected to load. So I want the switch circuitry to draw minimal current cuz is for battery powered device. It all depends on the pnp's base resistor (which is from collector of npn) cuz I need pnp to saturate when battery is at lowest operational level of charge but resistor has to be big enough to keep bias currents as low as possible which is all fine except bjt gain is super temperature sensitive! So I'm asking is there simple workaround or should I just use small enough resistor for worst case temp and suck the inefficiency down?
TNX!

PS I've thought about adding emitter degeneration to npn stage but that can't solve total problem

 

If you can allow greater voltage drop, make the PNP a darlington.

 

This is a very simple circuit which I call a double invert.
Some other hot-shot called it a Sziklai pair.
It seems that all you want is low current optimization to switch a 200 ma load.
You have seen that you can't produce a circuit that reliably saturates without wasting some drive current for the PNP transistor.
That's the nature of the beast.
You can optimize by selecting transistors with high gain right at the current levels you need, but pretending you can avoid temperature dependence is a fool's errand.

 

@Aleph(0)

As noted by @#12 the circuit you seem to be describing is a variant of the classic Sziklai/CF pair but with the PNP's emitter 'elevated' via the load...

Below is a real-world tested (even if shamelessly 'quick and dirty') arrangement -- Given the values shown, the PNP remains in saturation from below -10°F to 130°F (which being the range of my 'test environment')
Worst case 'collateral' current consumption is less than 3 mA (I assume you realize said circuit draws no current unless under bias) --- Note that a base pull-up on Q2 is unnecessary for DC operation!

Q1 is a general purpose NPN - Nominal HFE≈200
Q2 is described as a 'high current amplifier' nominal HFE > 200

Note:
If you're down to your 'New Tone' components (again) please note that Q1 may be substituted with 'NTE 123A' and Q2 with 'NTE 12' --- Note also that Q2 may be satisfactorily substituted with nearly any Si PNP employed (as a switch) in a CCFL inverter or photo-flash charging oscillator... The high IC rating is important owing to the necessarily high (Circa 100uF) decoupling capacitance bypassing the load...

Please note: For the purposes of this post LtSpice was used solely as a 'graphics tool' -- all testing was done 'in vivo' as it were - The value of R2 was 'settled upon' for the 'margin' offered over various (albeit similar) transistors and the above stated 140°F temp range -- FWIW it is my observation that silicon transistors' HFE @ -10°F ≈ 55% of that at 'room temperature' (≈ 72°F) -- Be advised, however, that the Δβ/ΔTemp characteristic is non-linear!

All the best
HP

PS
You will kindly forgive my conflation of beta and HFE (above)


.

 

If you can allow greater voltage drop, make the PNP a darlington.

You mean cuz super high gain PNP means less b to e current to leak to gnd through NPN?

 

http://forum.allaboutcircuits.com/attachments/double-invert-mosfet-png.107550/

#12 I know best one for my purpose is dual mosfet which is top circuit in file but I'm fighting time and I don't have pchan mosfet in personal stock Tnx for posting circuits for reference!

 

Below is a real-world tested (even if shamelessly 'quick and dirty') arrangement

HP Tnx! That's exactly the circuit I was thinking of! So I can try it with those nte parts you say and 4k7 resistor for R2 and post result!

 

HP I'm saying BIG TIME TNX! It totally works and only adds 2.1 ma to current! I'm very happy pnp survives charging 220uf cap across load too!

the PNP remains in saturation from below -10°F to 130°F (which being the range of my 'test environment')

Is test chamber garret lab?

 

You mean cuz super high gain PNP means less b to e current to leak to gnd through NPN?

Yes. The base current of the pass transistor just becomes part of the output current. The base current of the second transistor is reduced by the gain of that transistor so the 'lost' current is perhaps 100 times smaller.

 

Is test chamber garret lab?

Sans intensive 'thermal intervention' GL would certainly exceed both extremes over the course of a year!

Embarrassingly, my 'thermal test environment' consists of an 'old fashioned' 'deep freeze' rewired for direct control of the compressor and defrost heater -- Hey! What it lacks in the way of elegance it more than compensates with functionality!

Best regards
HP

 

@Aleph(0)

As noted by @#12 the circuit you seem to be describing is a variant of the classic Sziklai/CF pair but with the PNP's emitter 'elevated' via the load...

Below is a real-world tested (even if shamelessly 'quick and dirty') arrangement -- Given the values shown, the PNP remains in saturation from below -10°F to 130°F (which being the range of my 'test environment')
Worst case 'collateral' current consumption is less than 3 mA (I assume you realize said circuit draws no current unless under bias) --- Note that a base pull-up on Q2 is unnecessary for DC operation!

Q1 is a general purpose NPN - Nominal HFE≈200
Q2 is described as a 'high current amplifier' nominal HFE > 200

Note:
If you're down to your 'New Tone' components (again) please note that Q1 may be substituted with 'NTE 123A' and Q2 with 'NTE 12' --- Note also that Q2 may be satisfactory substituted with nearly any Si PNP employed (as a switch) in a CCFL inverter or photo-flash charging oscillator... The high IC rating is important owing to the necessarily high (Circa 100uF) decoupling capacitance bypassing the load...

Please note: For the purposes of this post LtSpice was used solely as a 'graphics tool' -- all testing was done 'in vivo' as it were - The value of R2 was 'settled upon' for the 'margin' offered over various (albeit similar) transistors and the above stated 140°F temp range -- FWIW it is my observation that silicon transistors' HFE @ -10°F ≈ 55% of that at 'room temperature' (≈ 72°F) -- Be advised, however, that the Δβ/ΔTemp characteristic is non-linear!

All the best
HP

PS
You will kindly forgive my conflation of beta and HFE (above)


View attachment 107556 .

We used those circuits to switch EM relays when we prototypesd PLCs with A------ (expletive deleted)
@Aleph(0) you need more patience! Get a p-channel MFT and give your battery budget a break! I mean Jebus! You can next-day it from Mouser! I mean like where's the fire?

 

when we prototypesd PLCs with A------ (expletive deleted)

 

See

 

See

View attachment 107783

Thanks for that! --- I hope, someday, to master Spice!

Best regards
HP

 

Thanks for that! --- I hope, someday, to master Spice!

Best regards
HP

HP I say it's all about confidence building! Cuz we can simply prototype simple circuits physically but for complex circuit we want to be sure before investing all that time and agro so I say _mastery_ means knowing limits of simulator well enough to safely interpret results!