Qn on find fall time in logic gate

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WBahn

Joined Mar 31, 2012
24,702
Pls refer to attached pic.

My working is as follows:
Since the current is sinking, the logic gate must be low. And since low voltage is defined as 1.5V so Vdd-1.5=3.5V. 3.5V is the output voltage. Sub in all the values to get t. Where did I get wrong?
Sorry, my crystal ball is in the shop and I'm not a mind reader. You don't even tell us what answer you got, let alone show any work, but expect us to be able to tell where you went wrong???? Does that sound like a reasonable request?

What do you mean by 3.5 V being the output voltage? When Vout is 3.5 V, the output is still HI (barely).

At least draw a sketch of the waveform and indicate on it what you think the fall time measurement should be. There's a fair chance that in doing so you will see your mistake and, if not, will make it a lot easier for us to see what your thinking is so that we can offer suggestions.
 

Thread Starter

danatic

Joined Jul 4, 2015
31
Hi guys, thanks for replying. I managed to find out the solution after sometime. Please kindly close this thread or how do I marked it as resolved? Thank you.
 

WBahn

Joined Mar 31, 2012
24,702
By and large you just did (mark it as resolved). But I can also close it to further replies since you've specifically requested it.
 
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