The program builds successfully,but the pwm output is not there
here is the code
here is the code
Code:
/////////////header file
#include <xc.h>
#pragma config BWRP = OFF // Boot Segment Write-Protect Bit (Boot Segment may be written)
#pragma config BSS = DISABLED // Boot Segment Code-Protect Level bits (No Protection (other than BWRP))
#pragma config BSS2 = OFF // Boot Segment Control Bit (No Boot Segment)
#pragma config GWRP = OFF // General Segment Write-Protect Bit (General Segment may be written)
#pragma config GSS = DISABLED // General Segment Code-Protect Level bits (No Protection (other than GWRP))
#pragma config CWRP = OFF // Configuration Segment Write-Protect Bit (Configuration Segment may be written)
#pragma config CSS = DISABLED // Configuration Segment Code-Protect Level bits (No Protection (other than CWRP))
#pragma config AIVTDIS = DISABLE // Alternate Interrupt Vector Table Disable Bit (Disable Alternate Vector Table)
// FBSLIM
#pragma config BSLIM = 0x1FFF // Boot Segment Code Flash Page Address Limit Bits (Boot Segment Flash Page Address Limit (0-0x1FFF))
// FOSCSEL
#pragma config FNOSC = FRCDIVN // Initial oscillator Source Selection Bits (Internal Fast RC (FRC) Oscillator with postscaler)
#pragma config IESO = ON // Two Speed Oscillator Start-Up Bit (Start up device with FRC,then automatically switch to user selected oscillator source)
// FOSC
#pragma config POSCMD = NONE // Primary Oscillator Mode Select Bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = OFF // OSC2 Pin I/O Function Enable Bit (OSC2 is clock output)
#pragma config IOL1WAY = ON // Peripheral Pin Select Configuration Bit (Allow Only One reconfiguration)
#pragma config FCKSM = CSDCMD // Clock Switching Mode Bits (Both Clock Switching and Fail-safe Clock Monitor are disabled)
#pragma config PLLKEN = ON // PLL Lock Enable Bit (Clock switch to PLL source will wait until the PLL lock signal is valid)
// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler Bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler Bit (1:128)
#pragma config FWDTEN = ON // Watchdog Timer Enable Bits (WDT Enabled)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable Bit (Watchdog timer in Non-Window Mode)
#pragma config WDTWIN = WIN25 // Watchdog Window Select Bits (WDT Window is 25% of WDT period)
// FPOR
#pragma config BOREN0 = ON // Brown Out Reset Detection Bit (BOR is Enabled)
// FICD
#pragma config ICS = PGD1 // ICD Communication Channel Select Bits (Communicate on PGEC1 and PGED1)
// FDMTINTVL
#pragma config DMTIVTL = 0xFFFF // Lower 16 Bits of 32 Bit DMT Window Interval (Lower 16 bits of 32 bit DMT window interval (0-0xFFFF))
// FDMTINTVH
#pragma config DMTIVTH = 0xFFFF // Upper 16 Bits of 32 Bit DMT Window Interval (Upper 16 bits of 32 bit DMT window interval (0-0xFFFF))
// FDMTCNTL
#pragma config DMTCNTL = 0xFFFF // Lower 16 Bits of 32 Bit DMT Instruction Count Time-Out Value (Lower 16 bits of 32 bit DMT instruction count time-out value (0-0xFFFF))
// FDMTCNTH
#pragma config DMTCNTH = 0xFFFF // Upper 16 Bits of 32 Bit DMT Instruction Count Time-Out Value (Upper 16 bits of 32 bit DMT instruction count time-out value (0-0xFFFF))
// FDMT
#pragma config DMTEN = ENABLE // Dead Man Timer Enable Bit (Dead Man Timer is Enabled and cannot be disabled by software)
// FDEVOPT
#pragma config PWMLOCK = ON // PWM Lock Enable Bit (Certain PWM registers may only be written after key sequence)
#pragma config ALTI2C1 = OFF // Alternate I2C1 Pins Selection Bit (I2C1 mapped to SDA1/SCL1 pins)
// FALTREG
#pragma config CTXT1 = NONE // Interrupt Priority Level (IPL) Selection Bits For Alternate Working Register Set 1 (Not Assigned)
#pragma config CTXT2 = NONE // Interrupt Priority Level (IPL) Selection Bits For Alternate Working Register Set 2 (Not Assigned)
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.
#include <xc.h>
#define _XTAL_FREQ 8000000
/////////////////main file
#include <stdio.h>
#include <stdlib.h>
#include "newfile.h"
/*
*
*/
void init_PWM()
{
/* ~~~~~~~~~~~~~~~~~~~~~~ PWM1 Configuration ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* PWM1 I/O Control Register register */
IOCON1bits.PENH = 1; /* PWM1H is controlled by PWM module */
IOCON1bits.PENL = 1; /* PWM1L is controlled by PWM module */
IOCON1bits.PMOD = 0; /* Select Complementary Output PWM mode */
/* Load PDC1 register with initial Duty Cycle value */
PDC1 = 640; /* Duty Cycle = PDC2*1.05nsec = 672nsec */
/* Load PDTR1 and ALTDTR2 register with preset dead time value */
DTR1 = 64; /* Deadtime setting */
/* Deadtime = DTR1*1.05 = 67.2nsec */
ALTDTR1 = 64; /* Deadtime setting */
/* Deadtime = ALTDTR1*1.05 = 67.2nsec */
/* PHASE1 register */
PHASE1 = 0; /* No phase shift */
/* ~~~~~~~~~~~~~~~~~~~~~~ PWM2 Configuration ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* PWM2 I/O Control Register register */
IOCON2bits.PENH = 1; /* PWM2H is controlled by PWM module */
IOCON2bits.PENL = 1; /* PWM2L is controlled by PWM module */
IOCON2bits.PMOD = 0; /* Select Complementary Output PWM mode */
/* Load PDC2 register with initial Duty Cycle value */
PDC2 = 640; /* Duty Cycle = PDC2*1.05nsec = 672nsec */
/* Load PDTR2 and ALTDTR2 register with preset dead time value */
DTR2 = 64; /* Deadtime setting */
/* Deadtime = DTR2*1.05 = 67.2nsec */
ALTDTR2 = 64; /* Deadtime setting */
/* Deadtime = ALTDTR2*1.05 = 67.2nsec */
/* PHASE2 register */
PHASE2 = 240; /* approximately 250 nsec phase shift */
/* Phase shift = PHASE2*1.05nsec = 252nsec */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* Configure PTPER register to produce 400kHz PWM frequency */
PTPER = 2380; /* PWM Period @30 MIPS, 2.5usec == 400kHz */
/* Period = PTPER*1.05nsec = 2.499usec
/* PWM Time Base Control Register */
PTCONbits.PTEN = 1; /* Enable the PWM Module */
}
/*****************************************************************************/
/* MAIN ROUTINE */
/*****************************************************************************/
int main()
{
init_PWM();
while(1); /* Infinite Loop */
}
