I have to design and simulate a simple second-order unity-gain Sallen-Key low-pass filter. Specifications are: f_c=10kHz and damping ratio=1 (in order to have no overshot in step-response).

I choose R1=R2 and C1=C2. So I got from equation R1=R2=15kOhm and C1=C2=1nF.

Then I simulated it on Orcad PSpice.

The frequency response seems to be as expected but the step response is totally wrong!!


What am I doing wrong?

Thanks!

 

The problem is likely from the input pulse starting at 0V with the negative op amp supply at ground, which means the op amp is not necessarily in the linear region at the start of the pulse.
Try a 1V to 2V step.

Note that, with a real circuit, your filter will not work properly with a normal AC input that goes plus and minus around ground since you only have a single op amp supply voltage.
You either need to offset the AC so it stays above ground, or AC couple the signal with the input DC biased to about 1/2 the supply voltage.

 

The problem is likely from the input pulse starting at 0V with the negative op amp supply at ground, which means the op amp is not necessarily in the linear region at the start of the pulse.
Try a 1V to 2V step.

Note that, with a real circuit, your filter will not work properly with a normal AC input that goes plus and minus around ground since you only have a single op amp supply voltage.
You either need to offset the AC so it stays above ground, or AC couple the signal with the input DC biased to about 1/2 the supply voltage.

Thanks for answer!
I must add some details: the filter will be realized on breadboard and connected to an AC source 4Vpp with DC offset of 2V (it is the DAC pin of a PIC). I have to use single supply voltage (taken from USB). The op-amp I chose is rail-to-rail so I think I'll avoid op-amp saturation.

I repeated simulation with 1V to 4V step (with capacitor initial condition on 0V) and the result is:

As you suggested, if I simulate step response 0V to 4V with double supply (-5V,5V) the problem disappear.

Could you give me more detailed explanation on this unexpected behavior?
Even if I have a 2V DC bias which avoids the problem, it will always be this behavior at power on: are there side effects?

 

Could you give me more detailed explanation on this unexpected behavior?

When the input is at 0V, small input offsets can cause the output to want to go slightly negative, but it can't because the negative supply voltage is also 0V.
So some of the internal circuitry saturates trying to go negative, and thus is no longer biased in the linear region. When the input suddenly goes positive, it takes some time for the circuitry to return to the linear mode, especially if the internal compensation capacitor is in a part of the circuit that saturated.
During that recovery time the output can overshoot the input or do other odd things, until everything has recovered to its normal bias point.

Make sense?

Even if I have a 2V DC bias which avoids the problem, it will always be this behavior at power on: are there side effects?

No side effects.
Once it has recovered from the transient, it will continue to operate normally as long as the signal does not go completely to 0V or to 5V for any significant length of time.

 

When the input is at 0V, small input offsets can cause the output to want to go slightly negative, but it can't because the negative supply voltage is also 0V.
So some of the internal circuitry saturates trying to go negative, and thus is no longer biased in the linear region. When the input suddenly goes positive, it takes some time for the circuitry to return to the linear mode, especially if the internal compensation capacitor is in a part of the circuit that saturated.
During that recovery time the output can overshoot the input or do other odd things, until everything has recovered to its normal bias point.

Make sense?
No side effects.
Once it has recovered from the transient, it will continue to operate normally as long as the signal does not go completely to 0V or to 5V for any significant length of time.

Thanks