I am attempting to build a circuit which runs an Atmega 328P from the secondary winding of a current transformer (CT). I can charge a 22000uF capacitor to around 8v in approximately 20 seconds, provided I have no load connected. The micro-controller is programmed to drop immediately into sleep mode, during which the input from the CT is sufficient to keep it running. I have a 5v 100ma regulator to take the 8v and drop it to 5v for the chip. However, the problem is that on startup significantly more current is used, so the voltage will rise to 1v or 1.5v, at which point the chip starts sinking the tiny bit of current available, and prevents further charging.
I have tried using an LM339 comparator with one input tied to 1.8v by a red led and resistor, and the other being whatever is in the cap, but the LM339, resistor, and LED together again use too much power before they actually start working, and in the meantime leak voltage through to the micro-controller anyway.
I have also tried using a Schmidt trigger inverter which was better than the comparator, but again, it leaks voltage through as well as using some power itself, and still will not let the capacitor charge.
In addition to this I have tried a transistor and P mosfet with a good chunk feedback to make it 'snap' open and closed as per https://jeelabs.org/2015/05/13/micro-power-snitch-success/ but this does not seem to work either. Some probing with my meter suggests that the two LEDs are burning up the power which should be charging the capacitor.
What I need is something like a voltage regulator which stays firmly closed until a set voltage is reached. There must be some ic or circuit around for doing it (maybe solar charging would be similar), but I can't seem to find anything. After three days of trying different options I'm beginning to wonder if this is the reason why so many devices have RTC modules with a coin cell to fire a wakeup call. Am I going to have to default to this, or is there a method completely without batteries?

 

What about something like this - www.pbase.com/image/167970229
2uA zener leakage, 5V1 > 5V6. The TPS3700 is a H/L comparator with built in reference + hysteresis, at 5.6uA, latches a High Side switch
to a ultra low loss / quiescent LDO. Gives a clean 5V switch oN/oFF

 

What about something like this - www.pbase.com/image/167970229
2uA zener leakage, 5V1 > 5V6. The TPS3700 is a H/L comparator with built in reference + hysteresis, at 5.6uA, latches a High Side switch
to a ultra low loss / quiescent LDO. Gives a clean 5V switch oN/oFF

Thanks very much @digsys , this looks exactly like what I want! I have ordered one which is coming early next week, I'll let everyone know the results of my testing.

 

yw. I've tweaked the circuit a bit ... the TPS3700 is one of my favourite ICs for low power / battery circuits. It is actually 2 separate comparators.
1 switches H>L and the other L>H .. both inputs don't need to be connected together, I was too lazy to remember which logic was which
Just connect the correct OPA / B to the PFET.
The only thing you may have to tweak, is the very first start up voltage, from 0V - app 0.5V. You might need to add
C1 or similar to stop the IC from a POR false pulse, but I don't think you'll need to. Let us know how you go.

 

I would use a simple resistive divider for the comparators' inputs. Zeners, especially "true" zeners (typically up to about 5.6 V and as opposed to avalanche diodes, even though we usually call the latter zeners) exhibit significant rounding at the knee of the voltage-current curve and begin to conduct well below the nominal voltage (note that the zener recommended is characterized at 5 mA - what you really want is one characterized at 10 µA and you won't find one). Using a zener makes a fairly precise comparator circuit into a very sloppy one.

I would also use a modern LDO regulator with an ENABLE input rather than mess around with a FET switch. Such regulators are designed for precisely this sort of application.

There are a few ultra low quiescent current switchers out there that might be worth considering instead of a linear regulator, though the complexity is a bit higher. The energy stored in a capacitor at 8 V is more than 2.5 times that at 5 V, so there significant benefit to a high-efficiency switcher. I don't know what you can find that will run with 8 V input - so many devices these days top out at about 6 volts.

 

I would use a simple resistive divider for the comparators' inputs

Thanks for your reply @ebp . I fully agree that the zener/avalanche diode is a waste of power, but I don't think that a voltage divider would work, because when the capacitor is at 0.8v for instance (just started charging), the switching point would be down around 0.5v would it not?

use a modern LDO regulator with an ENABLE input rather than mess around with a FET switch

I very much like that idea! Can you suggest a part number at all? Maybe the REG103?

 

Behavior at very low input voltage would have to be verified. I haven't looked at the datasheet carefully enough to know if there is sufficient detail in it to assess this, but it is "always" the case that a power supply is going to start at zero and spend some time in the "bad zone." When a FET is used as the output switch in the IC, a certain minimum supply voltage will be required to turn it on. The simplified block diagrams of ICs often omit important details that reveal what to expect. You also would need to look at the specs for the regulator to determine its behavior at very low input voltage if it were enabled before you want it to be. Older LDOs used PNP pass transistors and the base current was sunk to ground. With those reg's the input current could be several milliamps when the input voltage was too low to allow regulation. Newer LDO designs are very much better in this regard (often because the pass element is a P-channel MOSFET).

The issue I have with the zener at the comparator input is not the power but the fact that it makes the actual switching point of the comparator very hard to predict because of the conduction well below nominal voltage. Some zeners are fairly well specified and the datasheet will include at least "typical" V-I curves. I couldn't find anything resembling a decent datasheet for the zener that was recommended. The datasheet shows maximum current of 2 µA at 1.5 V, and characterization at 5 mA. The big question is what kind of current should be expected at say 3 or 4 volts. I really wish (well, wished - I don't do electronics anymore) that you could get low voltage zeners with really sharp knees at low current. They would be a huge boon to limiting and clamping circuits.

The REG103 has an active-high enable with a threshold of 0.5 V (see datasheet section on ENABLE), but a spec of 2.0 V minimum logic 1. This gives you some margin to assure that it wouldn't turn on if the input supply were below the supervisor's minimum but still have adequate enable voltage to meet the spec at 8 V - if that should prove necessary because the supervisor doesn't play nicely with very low supply voltage.

 

I just realized I was focusing on the zener issue & ignoring the fundamental requirement.

If I understand the requirement correctly, you need an output that is asserted when the capacitor voltage reaches 8 volts and remains asserted, either "permanently" or until the capacitor voltage falls below some voltage well below 8 volts, presumably because the CT output has dropped to zero and you need to restart "from zero" when it comes up again. In effect, you need a comparator with large hysteresis - output asserted when Vin rises above 8 V and deasserted when Vin falls below (say) 3.5 V (depends on the minimum your micro needs to operate properly - if you use ADC functions, then the reference voltage must be considered, so maybe the micro should shut down if the cap voltage falls below the minimum required for the regulator to deliver in-spec voltage).

I'd have to have a think about how to do this effectively with the TPS3700.

 

Extra notes: As you say, Just about all types of circuits have unpredictable behaviour when starting from 0V, and there's very few datasheets that
specify implicitly what happens. The zener was just one I picked at random, it doesn't matter what the type is, as long as it has low leakage (ish).
The point of it is to not allow any sensing to be done by the reference comparator until at least a few volts were up. Even with NO trimming,
the start voltage would be anywhere between say 4.0 - 5.5V. That's when the 0.4V ref / hysteresis takes over. The FET can switch anywhere
from ~6.0V onwards. You don't want it too high, as it will switch off too soon. It is easy to add extra polarised hysteresis to the circuit, but I think
it may be getting too complicated. And as you say, LDOs with enable are even more unpredictable at 0V start, which is why I don't use them for
for this type of application. I use these similar circuits in many battery type applications and they work fine. (The TPS3700 was developed for battery
management.) You can use diodes instead of the zener, for example, lots of choices.
lt was a ideas starting point for the OP, and there are heaps of ways to skin a cat !!
IF OP needs fine control, just add a trimpot to the zener, forming a voltage divider. cct updated: www.pbase.com/image/167970229

 

The TPS3700 does have well-defined behavior for all supply voltages. If VDD is less than 0.8 V, both outputs are high impedance. If VDD is greater than 0.8 V but less than 1.8 V, OUTA is LOW and OUTB is HIGH. If VDD is 1.8 V or higher then the outputs are determined by the voltages at the inputs of the comparators. A silicon diode in series with the pullup resistor on OUTA is adequate to assure proper behavior of OUTA for enabling a REG103 (0.5 V minimum for enable plus about 0.6 V for diode means no enable below 1.1 V under any circumstances and that means no enable for any voltage where the comparator output is high impedance due to low VDD).

Use resistors and forget the zener or diode strings. Even if the above were not true, a zener is not a good choice due to poorly specified behavior at low reverse voltage. The "leakage" value is a single point spec and not useful.

Hysteresis is required. The built-in hysteresis of the comparators is about 1.4% at 20 °C. If the comparator goes high at 8 V, it will go back low at about 7.8-7.9 V which is presumably completely unacceptable. That's with a resistive divider. With a tweaked zener the lower threshold would be even higher.

 

Here is an idea - use a voltage reference IC to trigger a latching switch.

When the voltage on the cap is less than ~ 8V, all you have is the current in the divider plus some device leakage.
Once the threshold is reached, positive feedback would latch the circuit on, until the input fell below the Vgs threshold of the FET.

Have not tested this, might need some tweaking of resistor values.

 

use a voltage reference IC to trigger a latching switch

That's also an interesting idea, so use one on these feeding into an LDO regulator? I'll test this as well, thanks.