predicting ability to lock on a special kind of PLL

Thread Starter

yef smith

Joined Aug 2, 2020
756
Hello , I am building a system shown below ,it consists of a YIG which is the reference oscilator and the main oscilator.
Yig is a device which changes its voltage as a function of voltage.
the main oscillator oscillates at a constant frequency always.
the mixer compares the reference oscillator frequency with the main oscillator frequency and produce voltage proprtional to the difference between the two.its called error voltage as shown bellow and the attached article.

The YIG device changes its output frequency by the amount of voltage it gets from the servo Amplfier.


if we look into general control theory of PID shown below we see that we need to track the desired signal and eventually get the error voltage to reduce.
I can make a transfer function of them amplifier.
I also can try and do a table of by how much my YIG changes its frequency as a function of voltage.
Also i can record the initial error voltage between the YIG and the main oscillator.
but how can i combine them and see if my SERVO amplifier can do the job and succeed in making a lock of the YIG oscillator and main oscillator?
Thanks.

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Attachments

When using a double balanced mixer as a phase detector, as is this case, lock is only rapid if the starting condition is with only a small offset between the VCO and the reference, within the loop bandwidth. The system reported in the paper you attached has only one oscillator so the frequency offset is zero, so using a DBM is not a problem, it is phase locking to the reflection from a resonator. This looks tricky to set up and get working hence the adjusters phi1, phi2, and A1.
 

Thread Starter

yef smith

Joined Aug 2, 2020
756
Hello , i can view each point on the diagram using spectrum analyzer or osciloscope.
When i will connect the system how can i investigate in real life?
Is there a way to investigate the locking of a PLL?
Thanks.
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MisterBill2

Joined Jan 23, 2018
18,584
To see if the servo amplifier "can do the job" and maintain the lock, see if the amplifier has an adequate frequency response.
Given that two double balanced mixers are being proposed as phase detectors, while the difference frequencies are quite high, my prediction is that the amplifier will not be even close to being able to allow a lock.
INSTEAD, use phase/frequency detectors.But still, I see only one oscillator and I see NO reference oscillator, or even a second frequency source. So with no reference there can be no phase lock
So if the TS wants to get advice or comments on a phase lock loop, we have a requirement to provide a description of where the phase being locked too is located.
Also an explanation of what that signal into the Low Noise amplifier is supposed to be.
 
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Thread Starter

yef smith

Joined Aug 2, 2020
756
Hello,There is only one double balanced mixer in the system shown bellow.
How can i know if my amplier has a good resonce which will fit the system?
"see if the amplifier has an adequate frequency response."
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michael8

Joined Jan 11, 2015
415
This article is locking a YIG oscillator to the resonance frequency of the cavity. A YIG oscillator is tuned by varying a magnetic
field and you should have specificatioins on the frequency response of the voltage input for the YIG frequency control.
Part of this limit to the YIG frequency change is the inductance of the coil make part or oall of the YIG magnetic field.
The article mentions their YIG was a special design for faster tuning.

As far as locking goes, I think you might learn something by opening the loop between the servo amplifier and the YIG
oscillator and sweep the YIG freqeuency observing the servo output. Also reconnecting them might enable seeing
a lock in (or other) event.

This assumes all the phase adjustments and everything else is working...
 

MisterBill2

Joined Jan 23, 2018
18,584
Now I understand that the ultimate intention is to force a non-resonance controlled oscillator to oscillate at the resonant frequency and phase, of a resonant cavity. Apparently this is to avoid phase noise, which is intrinsic to most oscillator circuits.
It appears that the scheme is to compare the phase of the signal present in the tuned resonant cavity with the phase of the tuned oscillator.
What I think I see is that unless the frequencies are very close, the correction scheme will produce a signal frequency much higher frequency than the magnetic correction scheme is able to follow.
A DBM will produce an output that is the difference of the two frequencies, with no information as to above or below. That is why the phase/frequency detector circuit was created.
An alternative, given the claimed high "Q" of the cavity, would be to add an amplitude detection sensor to monitor the cavity signal, which I am guessing will peak when the excitation is at the resonant frequency. That signal may be able to add to the phase correction signal to enhance the steering toward the resonant frequency.
 

Thread Starter

yef smith

Joined Aug 2, 2020
756
Hello, i have made a system to test the YIG. The tune is constant while the the FM coil is powered by the driver circuit we talked about before.
The tone goes from left to right.The big problem is as you can see below ,while its scanning sometimes i see relatively good signal some times i see the signal with two tones near the main,as shown below.
As i see it i have a problem with my YIG .
Could you please say what could cause such bad outputs from the YIG?
Thanks.

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MisterBill2

Joined Jan 23, 2018
18,584
The typical cause of losing ;lock in a PLL circuit is not quite enough signal to the phase detector, resulting in an intermittent function. But I am not an expert so I can't point out the most likely place where the low level is caused.
 

michael8

Joined Jan 11, 2015
415
It's not clear from your description how or what you have hooked up or where/what your are measuring. And I can't read
the screen images either.

Where was the schematic of the YIG FM coil driver and what's the signal into the driver?
 
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