Hello there,

I am struggling greatly to design a circuit which operates a solenoid using a touch sensitive switch. The solenoid is of the magnetically latching type which functions in two directions.

The operation should be as follows:

The touch sensor is tripped, activating the solenoid in one direction and power is maintained to the solenoid as long as the touch sensor detects contact.

The touch sensor is released, activating the solenoid in the opposite direction for a short time (10-100ms) and power to the solenoid is subsequently removed.

The circuit must operate on batteries therefore power consumption when inactive must be kept to an absolute minimum. I have 10.5V available from the battery although at present am using a touch sensor which operates at 4.5V. This is not ideal but i can put up with it until i come up with another solution for the sensor ic.

I have virtually no knowledge of electronics and my previous attempts at this have resembled a blind man landing a plane, it all goes fine until the end.

In an attempt to get this working in some regards I have disposed of the power on and timed off functions and temporarily used a mechanical switch for these purposes with the reasoning that it should be straightforward to add at a later date.

The touch sensor i am using is of type QT110 and has an output of 3.6V. I have attempted to use a 4066 CMOS ic to construct a DPDT switch using the output of the sensor chip as a signal however it did dawn on me too late that the output current from this chip would not be sufficient to drive the solenoid (which has 7.6 ? internal resistance and is of 6V rating).

In order to generate alternate signals for the DPDT switch i am using a 4049 inverter ic in order to generate two contrary signals.

In place of the 4066 i subsequently tried a CA3083 5 transistor chip wiring four of these transisors as a DPDT using the signals from the inverter ic. (I fed one signal through two inverters and the other through one in the hope that this would generate signals of approximate voltage.). I haven't yet worket out what is wrong with my second solution, all i know is that the output varies between -0.38V and 0.11V rather than the -10 and 10V output at which i am aiming.

Any suggestions which you feel may help would be greatly appreciated. This really is driving me nuts.

Thanks in advance.

 

When I have used latching relays in the past, I found that the use of an H-bridge driver has worked nicely.

I found this article on driving a latching relay using an H-bridge circuit.

hgmjr

 

That's an excellent link which is going to be invaluable to me now and in the future.

Many, many thanks.

 

Glad I could be of assistance.

If you encounter any problems developing your H-bridge latching relay driver, you can always return to this forum with subsequent questions.

As you might imagine, the number of cummulative years of experience represented by the total forum membership is quite large.

hgmjr

 

Check out this thread. It addresses the same problem. Study the entire thread carefully. You should find something that will work.

 

Thanks Ron, that thread will help me in the timing aspect for sure.

Taking a closer look at the H-bridge driver ive realised that's actually what im using, or trying to use. Here is the sketch i'm working from. I understand from the other thread that NPN transistors will negate the need for any inverters in my circuit, which is something i was hoping for, although it will be next week before i can get my hands on any of these.

In the meantime is the reason that this simple circuit will not function that it is misconceived? I am aware that there are no protection diodes in place.

Incidentally i have tried these transistors individually and they operate the solenoid without complaint.[attachmentid=1291]

 

Originally posted by hhoncho@Mar 18 2006, 12:52 PM
Thanks Ron, that thread will help me in the timing aspect for sure.

Taking a closer look at the H-bridge driver ive realised that's actually what im using, or trying to use. Here is the sketch i'm working from. I understand from the other thread that NPN transistors will negate the need for any inverters in my circuit, which is something i was hoping for, although it will be next week before i can get my hands on any of these.

In the meantime is the reason that this simple circuit will not function that it is misconceived? I am aware that there are no protection diodes in place.

Incidentally i have tried these transistors individually and they operate the solenoid without complaint.[attachmentid=1291]

[post=15150]Quoted post[/post]​

Your circuit will drive the solenoid, but the solenoid is always powered. Due to transistor storage times, it will also suffer from high shoot-through currents (short from vcc to gnd through 2 transistors) when it switches, and in your application, there is no need to even worry about that. Look at the last schematic I posted (repeated below). The H-bridge is basically the same as yours, but the timing applies a short pulse each time the input (your sensor) makes a transition. The rest of the time, the solenoid is off.
BTW, you can't use NPNs on the high side if your solenoid vcc is higher than your logic vcc. I don't know if this is your situation or not.

 

RonH has a done a nice job of drawing up a more detailed circuit that addresses the concerns I mentioned in my simultaneous reply below.

You have the basic circuitry hookup you need but there are a couple of things that will need to be considered.

1. Pull-in current of your solenoid coil.
2. You will need to add protection diodes across each of the transistors to safeguard them from the flyback current that is likely to result when you change the h-bridge's direction.
3. You need the ability to tri-state the drive to your transistors since the way you have the circuit shown it would appear that the drive is constantly applied.

The whole idea behind using the latching solenoid is to be able to remove power once you have driven it to the desired state. That is what is going to permit you to save on power consumption.

hgmjr

 

Yup i realise that power is always applied to that circuit, my intention was to try the polarity reversal section by itself in order to get its basic configuration right and then build the circuit around that, i should have made myself clear about that.

At present my solenoid Vcc is greater than my control Vcc although eventually i will replace the touch sensor ic with a cmos type in order that i can operate it from the same battery. Therefore i will use the npn only circuit for now and then change to the mixed circuit down the line. Presently this circuit is intended as a proof of concept so using two seperate batteries is acceptable although in time i would like to finalise it to the greatest extent possible, which would involve using a single 10.5V battery with the absolute minimum current drawn when idle (Basically to support the touch sensor ic and nothing else.).

Thanks very much the two of you for your time, i cannot overstate the importance to me of getting this thing right. I am going to take on board your suggestions, study the schematic and tailor it to my requirements and i'll get back in a day or two with more elementary questions.

 

Therefore i will use the npn only circuit for now and then change to the mixed circuit down the line.

I repeat - this won't work if your solenoid vcc is higher than your logic vcc. You will need a level shifter to drive the high side trannies, regardless of whether you use NPN, PNP, NMOS, or PMOS.

 

I thought that when you said:

BTW, you can't use NPNs on the high side if your solenoid vcc is higher than your logic vcc.

that the problem was to do with the NPNs specifically given that you referred to them specifically.

I will look into using a level shifter or an alternative touch sensor ic which will function at the same voltage as the rest of the circuit.

 

Hi I have some questions regarding the schematic: http://forum.allaboutcircuits.com/index.ph...pe=post&id=1293

What is the purpose of the XOR gate with the ground input (Fourth from the left.)? I would assume that said input is normally low but I cannot follow the logic of this circuit unless it is normally high, am I mistaken in the first or second regard here?

Secondly how do I implement a level shifter? Is it possible to route my low voltage signal through two sequential inverters on a CMOS ic in order to end up with a signal equivalent to the operational voltage of this chip, or is this ludicrously simplistic?

Finally what is the purpose of C2?

 

Forget about the level shifting part of my question for I have now sourced the component required for this.

I'm still interested in whether the signal ground input to the XOR gate is normally high or low and the purpose of C2.

Cheers

 

Hi can anyone reccomend mosfets for my circuit, my solenoid requires 1.4A.

Cheers

 

Nevermind I have it.

 

Originally posted by hhoncho@Mar 29 2006, 12:52 PM
Hi I have some questions regarding the schematic: http://forum.allaboutcircuits.com/index.ph...pe=post&id=1293

What is the purpose of the XOR gate with the ground input (Fourth from the left.)? I would assume that said input is normally low but I cannot follow the logic of this circuit unless it is normally high, am I mistaken in the first or second regard here?

Secondly how do I implement a level shifter? Is it possible to route my low voltage signal through two sequential inverters on a CMOS ic in order to end up with a signal equivalent to the operational voltage of this chip, or is this ludicrously simplistic?

Finally what is the purpose of C2?

[post=15578]Quoted post[/post]​

Grounding one input of an XOR makes it a noninverting buffer. Its purpose is to provide a delay which compensates for the delay of the inverting XOR stage, to make sure there is not a glitch-causing race at the input of the following NAND gate. It probably isn't necessary when you are driving a solenoid. It's just a good habit I picked up over the years.
Do you still need a level shifter? I don't know what your circuit looks like.
C2 is for a circuit where vcc is common to the logic and the H-bridge. It is to keep solenoid current transients from putting noise on the power supply, which could affect logic on the same supply.

 

Okay that makes sense, cheers.

I do still need a level shifter but I think I have located an IC to take care of that, its a ttl to cmos level shifter. I'll give you the name of it when I get into work tomorrow although right now I'm building the H-bridge portion alone to make sure it will drive the solenoid before designing and attaching the logic portion.

 

Having wasted another full day trying to get this damn thing working I am afraid to say that I have reached the end of my tether.

Please can someone recommend a way I can commision the design of this circuit. I have limited resources (I am self employed and the majority of my project funds are taken up by machining and etching, which is itself on a fast evaporating timescale) so the cheaper way the better. I will build it myself but I simply cannot dedicate any more time to something which will take someone skilled in the art no time at all. Cheers.