Pierce oscillator problem

Thread Starter

Amir Sarikhan

Joined May 29, 2015
45
Hello
I have a pierce oscillator (bjt)
I use cap 22n , 90p , l=330u
so I have to get f=923khz
but I get 836khz on scope what is the reason
and also when I use low amount of inductor 56u for example no oscillation occur

thanks
 

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Thread Starter

Amir Sarikhan

Joined May 29, 2015
45
Does output capacitance of transistor effect on result ?
Also why the gain decrease by increasing frequency about 2Mhz ?
 
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Hypatia's Protege

Joined Mar 1, 2015
3,228
Hello
I have a pierce oscillator (bjt)
I use cap 22n , 90p , l=330u
so I have to get f=923khz
but I get 836khz on scope what is the reason
and also when I use low amount of inductor 56u for example no oscillation occur

thanks
First off that is not a Pierce oscillator, the Pierce topology features a piezoelectric resonator as its feedback filter...

Re: LC oscillators in general -- Owing to parasitic reactances the operating frequency will generally be lower than the resonant frequency of the 'tank circuit' (i.e. feedback filter)... IOW your results are typical...:)

Best regards
HP
 

Hypatia's Protege

Joined Mar 1, 2015
3,228
Does output capacitance of transistor effect on result
Yes! -- As does the b-e capacitance...

Also why the gain decrease by increasing frequency about 2Mhz ?
Such 'non-linear response' owes to attenuation corollary to parasitic reactances as well as to the gain vs. frequency characteristics of the BJT --- Recall that an oscillator is, in essence, noting more than a 'regenerating' amplifier...

Best regards
HP
 

Thread Starter

Amir Sarikhan

Joined May 29, 2015
45
Such 'non-linear response' owes to attenuation corollary to parasitic reactances as well as to the gain vs. frequency characteristics of the BJT --- Recall that an oscillator is, in essence, noting more than a 'regenerating' amplifier...
But the 2n2222 transistor ft is about 300Mhz . But I loose the result in 3Mhz
"parasitic reactances" you mean the Cbe, Cce, Ccb ?
So If I want to get 100Mhz what kind of oscillator I need ?
 

Bordodynov

Joined May 20, 2015
3,431
Transistors have the variationof parameters.I have five 2N2222 transistors different manufacturers.There could be different spice parameters.I got 836kHz.It's the model:
.model 2n2222 npn(is=1e-14 vaf=100 bf=200 ikf=0.3 xtb=1.5 br=3 cjc=8e-12 cje=25e-12 tr=100e-9 tf=400e-12 itf=1 vtf=2 xtf=3 rb=10 rc=.3 re=.2 vceo=30 icrating=800m mfg=philips)
When you connect the oscilloscope input capacitance spurious enter edit.
You're not quite correctly included transistor.You can throw away the voltage divider and every thing will work.Inductance connects the base and collector DC.
 

Thread Starter

Amir Sarikhan

Joined May 29, 2015
45
You're not quite correctly included transistor.You can throw away the voltage divider and every thing will work.Inductance connects the base and collector DC.
So how do I bias the transistor ?
I changed the capacitors values so the Cce effect became lower .
but when I decrease the amount of inductor again I get no result .
I get the result on pspice but on real circuit there is not any oscillation for low amount of inductor .
Also it has not any dependence on transistor capacitance because frequency is low and ft of transistor is about 300Mhz
So why this is happening ?o_Oo_Oo_O
Please help me :(:(:(:(
 

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Bordodynov

Joined May 20, 2015
3,431
In their calculations, you should consider not ideality components.
Be sure to take into account the quality of inductance circuit
(serial resistance and other losses), it is desirable to take into
account the ESR and ESL oxide capacitor. To increase the
transmission path reduce the capacity of the first condenser (22nF-->4-15nf).
When working scheme P-N transition collector-base moves in the forward direction.
This greatly increases the capacitance Ccb (not linear)
and reduces the operating frequency.
 

Hypatia's Protege

Joined Mar 1, 2015
3,228

But the 2n2222 transistor ft is about 300Mhz . But I loose the result in 3Mhz
Indeed, the transition frequency (i.e. gain-bandwidth product) is not a 'major player' in the described situation...

"parasitic reactances" you mean the Cbe, Cce, Ccb ?
Yes, all the inter-electrode reactances (which generally present as capacitive -- especially when regarded as the parallel-equivalent reactive (i.e. 'imaginary") part of the junction's complex impedance ---- In addition to all 'stray' inter-component reactances which may effectively 'tune' and/or load the oscillator...

So If I want to get 100Mhz what kind of oscillator I need ?
From a purely pedagogical standpoint, I would suggest a Hartly (qv) or Colpitts (qqv) configuration, bewared, however, that anything approaching frequency stability suitable to practical application is unattainable with free-running oscillators at VHF

Best regards and good luck!:)
HP
 
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Bordodynov

Joined May 20, 2015
3,431
One more comment. Limit frequency transistor greatly depends
on the operating mode (current and voltage). For transistor 2N2222
frequency is normalized with a rated current of 20mA and 20V,
you have ~ 1 Ma and voltage is significantly lower.
Sometimes small currents works better transistor, which
has less frequency, but it is normalized on a smaller current.
Always see the measurement modes.
 

Bordodynov

Joined May 20, 2015
3,431
You can improve the conditions generating if increase base resistors
(R3 = 39k and R4 = 3.3k).
This will reduce the bypass of the oscillatory circuit.
The conclusions recommended power shunt ceramic capacitor.
For the simulation is not important, but in real life,
you can avoid problems (unnecessary parasitic feedbacks).
 

t_n_k

Joined Mar 6, 2009
5,455
The schematic posted by @Amir Sarikhan (TS) in post #8 is effectively a Colpitts topology.
There is a wealth of information on the web regarding the Colpitts design using a BJT.
With proper selection of the tuning capacitors, the effect of device parasitic elements at the sub 1 MHz operating frequency should be minimal. The common base (CB) version (rather than the CE version proposed) would further reduce the effect of Miller capacitance in the feedback path.
 

Hypatia's Protege

Joined Mar 1, 2015
3,228
The schematic posted by @Amir Sarikhan (TS) in post #8 is effectively a Colpitts topology.
Aye! Now that you mention it!:D --- I was so focused on the PI-network that I missed that -- Golly! Golly!:oops:

@Amir Sarikhan

FWIW A bit of background --- You may find it interesting to note that 'classic' Colpitts and Hartly configurations are analogous in that each features a 'split' tank reactor -- a tapped inductor in the case of the Hartly and, in essence, a tapped capacitor (implemented via series-connected capacitors) in the case of the Colpitts. In theory Colpitts topology favors lower noise designs (hence its greater 'popularity') howbeit said claim is widely, and, often, 'hotly', disputed...

Best regards
HP:)
 
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Thread Starter

Amir Sarikhan

Joined May 29, 2015
45
Hello thank you for answers
For transistor 2N2222
frequency is normalized with a rated current of 20mA and 20V,
you have ~ 1 Ma and voltage is significantly lower.
What do you mean about normalized frequency ?
With proper selection of the tuning capacitors, the effect of device parasitic elements at the sub 1 MHz operating frequency should be minimal.
The analysis the condition for oscillation is
gmR>c6/c5 (specified on schematic )
R=Rc||ro
with core losses
GmR>(X5^2+R*Rs)/(X6*X5) where X denotes reactance of capacitors
So with the aid of above conditions with the amounts of my caps I have to loose gain on 160Mhz not on 2 Mhz
I get the result on spice but not on real circuit
Also it is not dependent to transistor capacitance (parasitic) because when I parallel 47 p cap on BE of transistor or BC I get only insignificant difference because the values are very small and miller effect is insignificant .
So I can not find the reason of not oscillating on higher frequencies .
Why this circuit can not used to produce 100MHZ what is the limits ?
 

Hypatia's Protege

Joined Mar 1, 2015
3,228
So I can not find the reason of not oscillating on higher frequencies .
Why this circuit can not used to produce 100MHZ what is the limits ?

Are you (physically) prototyping the circuit or merely simulating it?

Real world circuits operating at VHF and above require special construction techniques (e.g. minimal lead lengths, lead geometry consistent with low inductance, minimization of undesired reactive coupling, etc.) moreover the oscillator should be isolated from the TDO's input impedance during testing (via, for instance, an untuned 'buffer stage') --- For construction examples of oscillators designed to operate at that (i.e. the 100 MHZ) range, you may 'Google' "FM wireless microphones" --- Be advised, however, that such oscillators are optimized for power as opposed to spectral purity and stability, even so, they should serve as good examples of proper VHF construction practice...

Best regards, and, again, good luck!:)
HP
 
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RichardO

Joined May 4, 2013
2,270
Coincidentally, I am working on a high frequency VFO as a test instrument.
Colpitts_VFO.png

The circuit simulates oscillation at over 1000 MHz. Will it really do this in real life? Not very likely.

I have built the Colpitts oscillator portion of the circuit on a solderless breadboard. The breadboarded circuit uses a CA3127 in a DIP package rather than the much higher performance HFA3127 (in an SMD package). There are no caps other than the strays of the breadboard contacts. The inductor is about 50 nH (two 100 nH parts in parallel).

The best I have gotten is about 130 MHz. This implies that the inductance and capacitance is many times what is simulated. If we assume that the inductance is not significantly greater than 50 nH then the stray capacitance must be on the order of 60 pF. Where is this capacitance? Most of it is between the strip contacts of the breadboard -- but not enough to explain the "low" frequency.

So, what I am saying is that circuits at these high frequencies are not easy to build and understand. I am still learning a lot myself. Much more work remains to be done.

I hope that this snippet of what I have done is some help to you. Feel free to ask for details.
 

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Thread Starter

Amir Sarikhan

Joined May 29, 2015
45
You've lost me on the frequency matter. In post #1 you indicated the expected operating frequency is 923kHz.
What's with the 160 MHz??
the 923 Khz problem solved it was the Cce effect
Most of it is between the strip contacts of the breadboard
Yes you are right I do not included this effect thank you very much
I think big part of my problem solved
 

RichardO

Joined May 4, 2013
2,270
Coincidentally, I am working on a high frequency VFO as a test instrument.
Here are some pictures to go with my earlier reply.

Colpitts_SBB_top.JPG Colpitts_SBB_wave.JPG

The first picture is my Colpitts oscillator on a solderless breadboard. The second picture shows a fairly clean and stable oscillation at about 175 MHz. The scope is set for 0.1 volts/div and 1 ns/div. Circuits I have built in the past have not worked this well.

Note the lack of long, insulated jumpers. The parallel jumpers are to decrease inductance -- at the cost of slightly increased stray capacitance. Two buses and a lot of jumpers are used to decrease the impedance of the ground.

There are several unused contacts between the bias circuit and the oscillator input to reduce stray capacitance. Unfortunately, the pinout of the CA3127 makes it difficult to minimize the stray capacitance of the solderless breadboard circuit.
 
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