LS,
I use controlled hardware and make sure that data received enters the chip at pin 12.
However RCIF is not set.
Transmit is working correct.
What do I do wrong??

Picbuster

Setup code.
Mod:added Code tags.

ANSEL=0;
OSCCON=0b01100110; //8 Mhz
TRISA= 0b00000010;
TRISB= 0b11100000; // bit 5 transmit bit7 receive
TRISC= 0b11010000;
ANSEL =0b00000000; // analog


BAUDCON=0;
//========== transmit
TXSTAbits.SYNC=0;
TXSTAbits.TXEN=1;
//======== Receive
RCSTA=0; // all zero
RCSTAbits.CREN =1;
RCSTAbits.SPEN=1;
//========= baudrate
SPBRG = 25; // 19200
BRGH=1;
BRG16=0;
//===================
PIE1bits.RCIE=On;
//===================
TMR1IE=On;

PEIE=1;
GIE=1;
//========================

T1CON=0b10111101;
putch('!');
putch(13);
putch(10);
putch(13);
putch(10);
putch('S');
//================================== interrupt =======================

void __interrupt()
Isr(void)

{

if (TMR1IF)
{
TMR1IF=0; // always running
Timer++;
if (Timer >1)
{
Timer=0;
Alive=!Alive; // working
}
}


if (PIR1bits.RCIF) // usart received char
{
// PIR1bits.RCIF=0; not allowed is read only


if (RCSTAbits.OERR) // check for overrun.
{
RCSTAbits.CREN=0; // clear receiver
RCSTAbits.CREN=1; // re-enable
}
Led_Rd=1;
if (RCREG){Transmit=Off;}
if (RCREG== SOH){In_Pointer=0;}
if (RCREG == EOT)
{
Block_In=On;
Led_Rd=0;
}
else
{
In_Data[In_Pointer]=RCREG;
In_Pointer++;
}
// }

}
//===================== end data read ==========================================
}

 

It is hard to determine from what you posted. It's incomplete.
But here are some general things to check out.

In init:
Set the baud rate before enabling the UART.
Write the various configuration registers as BYTES, not individual bits. Sometimes the r-m-w nature of bit flipping on volatile registers can be problematic.
Read RCREG and clear any FERR/OERR conditions until RXIF is 0 before enabling the interrupts to flush out any garbage from init.

In the interrupt routine:
Read RCREG exactly once per interrupt into a temporary register. Then perform any tests on that value on the temporary register. As written, there is no guarantee that RCREG will be the same value from test to test as it will change on the reception of the next character.
At 19200 baud, characters arrive every 521 uS or so. The interrupt routine must complete in that time including your timer stuff to avoid overrun errors.

Check out this from the errata:

3.4 Unexpected Results
Unexpected results occur if the EUSART is
disabled and then re-enabled with the EUSART
receive interrupt and global interrupts enabled, then
a single-cycle instruction is followed by a 2-cycle
instruction.
Work around
Always execute at least two single-cycle
instructions, immediately following setting the
SPEN bit to ‘1’.

Have you set a breakpoint at the RXIF test to see if it indeed is never being set?

It's late but that's a start.

Good luck!

 

It is hard to determine from what you posted. It's incomplete.
But here are some general things to check out.

In init:
Set the baud rate before enabling the UART.
Write the various configuration registers as BYTES, not individual bits. Sometimes the r-m-w nature of bit flipping on volatile registers can be problematic.
Read RCREG and clear any FERR/OERR conditions until RXIF is 0 before enabling the interrupts to flush out any garbage from init.

In the interrupt routine:
Read RCREG exactly once per interrupt into a temporary register. Then perform any tests on that value on the temporary register. As written, there is no guarantee that RCREG will be the same value from test to test as it will change on the reception of the next character.
At 19200 baud, characters arrive every 521 uS or so. The interrupt routine must complete in that time including your timer stuff to avoid overrun errors.

Check out this from the errata:


Have you set a breakpoint at the RXIF test to see if it indeed is never being set?

It's late but that's a start.

Good luck!

Thank you for your effort.
I did found my stupid error
Analog should be switched off for that port.
I did this for ANSEL but the port analog switch lives at ANSELH.

I must be pissed or asleep or just stupid however problem solved.

Again thank you.

Picbuster