Hi all,

I am working on a new project which involves reading light intensity from a photodiode (UDT-PIN10DP). The output voltage is then fed to a micro controller though a Serial ADC. There is no requirement of fast operation of the system i.e. the whole system works at low BW. I have LMP7721 for photodiode amplifier (low bias current) and ADS7822 for serial ADC. I have read somewhere to put a capacitor in between the opamp and SAR ADC and this capacitive load for LMP7721 should also be isolated(using a simple Resistance in series). i don't know how to go for the design of this Riso and C. I am reading lot of literature available on the net BUT still no idea. Somewhere I also read that the feedback capacitor(employed in photodiode amplifier design) is sufficient as it will also solve the problems arising due to capacitive loading for the photodiode amplifier. Can anyone tell me how to go about this capacitive loading problem.

Thanks

 

The only place that I can see for a C is in the feedback loop of OP Amp as signal is a slow varing DC V.

 

So, if a fast signal was to be digitized, then a capacitor should have been required. BUT the feedback capacitor effect are seen only in the bode plot of the Noise Gain(1/β) thus reducing the gain peaking of the photodiode amplifier closed loop. While the loading capacitor changes open-loop gain plot, thus making the system tending towards unstable, Then how come only feedback capacitor is sufficient. kindly clarify as i am little confused. if there are any application notes etc on feedback capacitor design with loading capacitor kindly send.

Thanks

 

This or this may give you some insight.