# phase shifting 1-100MHz

Thread Starter

#### jonjames85

Joined Dec 13, 2017
18
Hi all,

I am designing a circuit to measure voltage signals between 1-100MHz (multiple frequency content). The circuit is fed from a capacitive divider in order to safely convert from high to low voltage. Firstly could anyone recommend the best matching method for this frequency range at the output of the divider (parallel capacitor to ground) to 50Ω? The LV capacitor side is around 20nF. Initially, I have just attempted a 50Ω series resistor and some additional capacitors to get a flat 3dB magnitude response, however, there is a significant variation in S21 phase over the range and if I test the circuit with a time domain waveform there is a phase mismatch, as seen in the attached images. The simulation is done in ADS with port 1 set to the input to the capacitive divider, hence the poor S11 plot.
Are there any methods or commercial products that could shift the phase of the entire frequency range to a common reference point (e.g. 0 deg)? I don't know much about phase shifters but the ones I have seen shift the entire frequency range by a set amount, as opposed to an amount determined by frequency? Any advice is greatly appreciated.

thanks

#### cariban

Joined Aug 14, 2018
69
Hi all,

I am designing a circuit to measure voltage signals between 1-100MHz (multiple frequency content). The circuit is fed from a capacitive divider in order to safely convert from high to low voltage. Firstly could anyone recommend the best matching method for this frequency range at the output of the divider (parallel capacitor to ground) to 50Ω? The LV capacitor side is around 20nF. Initially, I have just attempted a 50Ω series resistor and some additional capacitors to get a flat 3dB magnitude response, however, there is a significant variation in S21 phase over the range and if I test the circuit with a time domain waveform there is a phase mismatch, as seen in the attached images. The simulation is done in ADS with port 1 set to the input to the capacitive divider, hence the poor S11 plot.
Are there any methods or commercial products that could shift the phase of the entire frequency range to a common reference point (e.g. 0 deg)? I don't know much about phase shifters but the ones I have seen shift the entire frequency range by a set amount, as opposed to an amount determined by frequency? Any advice is greatly appreciated.

thanks
Would you please upload the circuit/schematics here? It is hard to image the circuit just from your description.

Thread Starter

#### jonjames85

Joined Dec 13, 2017
18
Hi,

A divider is required initially as the measured voltage is high (hundreds of kV) and a capacitive divider in my case is the safest way to measure it. I have considered using high power attenuators on the output of the divider but to get the voltage down to a reasonable magnitude for this I need additional capacitance on the low voltage side of the divider. Ideally this would be achieved, with a parallel capacitor bank (shown by black arrow in attached simplified circuit). For this I need capacitors of very low ESL and therefore ceramic SMD capacitors are probably the best option. This works well until I consider a microstrip connection (not shown in image) between the divider capacitance and the parallel capacitor bank, which then appears to cause resonances within the 1-100MHz bandwidth I require. to get a reasonable response I have inserted a series resistor between divider and parallel capacitors and then a basic high pass circuit (series capacitor) to get a flat response, however with the series 50Ω resistor, the divider/parallel capacitors are no longer in parallel and then to achieve attenuation to around the -100dB total mark I use the parallel resistors shown.

I suppose it would be similar to achieving good matching/response of parallel decoupling capacitors? However I have limited expertise in this area to be honest.

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#### cariban

Joined Aug 14, 2018
69
Hi,

A divider is required initially as the measured voltage is high (hundreds of kV) and a capacitive divider in my case is the safest way to measure it. I have considered using high power attenuators on the output of the divider but to get the voltage down to a reasonable magnitude for this I need additional capacitance on the low voltage side of the divider. Ideally this would be achieved, with a parallel capacitor bank (shown by black arrow in attached simplified circuit). For this I need capacitors of very low ESL and therefore ceramic SMD capacitors are probably the best option. This works well until I consider a microstrip connection (not shown in image) between the divider capacitance and the parallel capacitor bank, which then appears to cause resonances within the 1-100MHz bandwidth I require. to get a reasonable response I have inserted a series resistor between divider and parallel capacitors and then a basic high pass circuit (series capacitor) to get a flat response, however with the series 50Ω resistor, the divider/parallel capacitors are no longer in parallel and then to achieve attenuation to around the -100dB total mark I use the parallel resistors shown.

I suppose it would be similar to achieving good matching/response of parallel decoupling capacitors? However I have limited expertise in this area to be honest.
Where is the voltage source injected in the schematics? And what are the values of the capacitors in the divider?

Thread Starter

#### jonjames85

Joined Dec 13, 2017
18
The schematic shows the s parameter simulation only and the 2 corresponding ports, for the transient simulation the voltage source would replace term 1.

Thanks

#### cariban

Joined Aug 14, 2018
69
The schematic shows the s parameter simulation only and the 2 corresponding ports, for the transient simulation the voltage source would replace term 1.

Thanks
Let me summary what you would achieve. You want to measure the level of a high-voltage signal. The signal has a bandwidth of
[1, 100]MHz. Because the voltage is too high, you use two capacitors to build a voltage divider.

I would like to comment a little bit about your model:
1. You use 50 Ohm as the impedance of the voltage source. Is this assumption correct in reality? I would think 0 Ohm may be more realistic;

2. What are the values of the capacitors? If the reactance of both capacitors are much bigger than 50 Ohm (I guess it is the case, otherwise the current through the divider will be too high), then the output signal has the same shape as input signal.
Vout = Vin * XC1/(XC1 + XC2 + Rs) ~= Vin * XC1/(XC1 + XC2), assume XC1>>Rs, XC2>>Rs;
In this case, you should obtain very flat magnitude response and almost linear phase response. Note that here we talk about voltage transfer function, not S21. For you purpose, voltage transfer function makes more sense than S21;

3. Use high impedance probe to measure the output voltage of the divider. It is also possible to use 50 Ohm instrument, but you need to add
big enough resistor (at least 10 times bigger then XC1 or XC2) in series to reduce the impact to the divider composed by capacitors;

4. If you would like to use transmission line (for example microstrip line) to lead the signal to a remote place. You can put the divider composes by two resistors (one resistor with resistance >> XC1, or XC2, another one is 50 Ohm) close to the divider composed by capacitors. Then use transmission line to connect to the measurement point or front connector. Refer to the attached drawing (please forgive me about the bad drawing).

5. The first divider composed by capacitors could be replace by resistor divider as well.

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Thread Starter

#### jonjames85

Joined Dec 13, 2017
18
Cariban,

Thanks for your detailed response. I should have been more clear with the source at the HV end, for the AC/transient simulations I have used an ideal source, maybe the use of 50ohm S parameter port at the HV side is incorrect?

The capacitors are 16pF for the HV side and around 100nF total at the LV side, although I wanted to split this 100nF between the device and an external capacitor bank (suitably low ESL) to simplify construction, hence the required microstrip/line connection (not shown in image but would be between the divider and the next capacitor along). Inserting a series resistors between the two removes the option of paralleling the LV side?

The HV side reactance is >50ohm over the frequency range, however, the LV side will not be, will this affect the output waveform shape? I'm not too concerned about the current magnitude at the moment, these transients are very short in duration and are measured over 1 second maximum with suitable cooling time between measurements. I am more concerned about possibly losing detail of the waveshape.

I will follow your advice and avoid S21 for the time being. I was planning on using a scope with 1MΩ input, after some protection circuitry of course and consideration of the effect of the scope input capacitance might have. The setup prevents me using a resistive divider at the HV input, also I would have greater concerns about insulation levels with the direct connection, the divider wont have a direct connection to the HV electrode in this case. I have considered keeping making the LV capacitance smaller, resulting in a higher output than I want, but further reducing this with attenuators? this might be a better option.

Any more advice is very welcome.

thanks

#### cariban

Joined Aug 14, 2018
69
Cariban,

Thanks for your detailed response. I should have been more clear with the source at the HV end, for the AC/transient simulations I have used an ideal source, maybe the use of 50ohm S parameter port at the HV side is incorrect?

The capacitors are 16pF for the HV side and around 100nF total at the LV side, although I wanted to split this 100nF between the device and an external capacitor bank (suitably low ESL) to simplify construction, hence the required microstrip/line connection (not shown in image but would be between the divider and the next capacitor along). Inserting a series resistors between the two removes the option of paralleling the LV side?

The HV side reactance is >50ohm over the frequency range, however, the LV side will not be, will this affect the output waveform shape? I'm not too concerned about the current magnitude at the moment, these transients are very short in duration and are measured over 1 second maximum with suitable cooling time between measurements. I am more concerned about possibly losing detail of the waveshape.

I will follow your advice and avoid S21 for the time being. I was planning on using a scope with 1MΩ input, after some protection circuitry of course and consideration of the effect of the scope input capacitance might have. The setup prevents me using a resistive divider at the HV input, also I would have greater concerns about insulation levels with the direct connection, the divider wont have a direct connection to the HV electrode in this case. I have considered keeping making the LV capacitance smaller, resulting in a higher output than I want, but further reducing this with attenuators? this might be a better option.

Any more advice is very welcome.

thanks
In theory it is ok to use capacitor divider to scale down the voltage, but you must choose the capacitors carefully. You said you will use 100nF at the GND side, but the resonance frequency of the capacitor may be much lower than 100 MHz. Refer to the attached impedance plotting for a typical 100nF/0603 ceramic capacitor. Capacitors with lead are even worse.

So I would suggest to use resistors to make the divider. I have made a schematics based on resistor divider. Please refer to the attached drawing. I also use a transformer to isolate the high voltage source for safety reason. A couple of thousands volt is very dangerous to both human and to the instrument. When you are measuring the scaled-down signal, use BNC cable to connect the signal to the oscilloscope. Choose 50 Ohm termination inside oscilloscope. High-impedance probe is not recommended since it will pick up much more environment noise.

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