Hi.

I was wondering if someone could tell me if this kind of connection would cause issues?
Its a SCLK line from a raspberry pi pin (top left) and it has to be shared with a display(middle) and two mcp3008 (adc converter chip, right).
I had the trace running through the display pin and continued to the mcp3008 but then I thought it might be not a good idea, if there are any connection issues with the display it would affect the MCP3008, so I split it right before the display pin. Is that an issue?
Or would I need to draw a separate connection for the MCP3008?

 

Yes and no. The answer is, I don’t know. The only way to find out is by testing it.

Here are the issues.
SDA and SCL are carrying high frequency signals. What is the max frequency?

You can split a trace at any location. The problem is that every high frequency trace must be treated as a transmission line. There are three concerns:

1) Every trace is a RF transmitter that can interfere with other sensitive signal lines.
2) At some point, every signal wire has to send its information to a receiver. That receiver is sensitive to unwanted interference.
3) Every signal trace is subject to ringing if there are changes in the impedance of the line. This can be caused by improper source and load termination, bends and kinks, and nodes and taps on the line.

Your focus is on SCL. However, SDA and other nearby traces will suffer the same consequences.

Edit: I once built a board with similar problems. After the PCB was made and assembled, the problems were resolved by running twisted pairs for both SDA and SCL lines.

 

The Max SCK for a MCP3008 (SPI interface) is 3.6MHz. At those speeds and with that size board, it's unlikely to matter where the signal split is.
1/100 of 10MHz is 30cm. So up to a ~foot, the distant signal points see effectually a single point connection with such a small phase shift across space.

At about 30MHz SPI on a typical sized board starts to tweak. Series damp resistors are a good idea to tame reflections.

 

I would do this just because it is easy and fast.
I don't see I2C as fast.

 

I would do this just because it is easy and fast.
I don't see I2C as fast.
View attachment 356132

Yea, that's how I had it basically before, but then I thought if there are any issues with the display it will also affect the mcp3008, thats why I made the split before the pin. But I guess if there would be an issue with the display I have to fix it anyway

 

if there are any issues with the display

For the first prototype, when I know there will be trouble, I often put 0 ohm resistors in line to break up the wire. On the bus there might be many parts, and one might be wrong. I hate 0 ohm or jumpers for production. We have test machines and they use 0 ohm or 2.2 ohm resistors in may places because it helps find shorts.

 

Further to @MrChips' and @ronsimpson's answer, there is no issue with running the trace through the display pin(s) - SCL & SDA - but you need to consider two issues:

1. Near- and far-end crosstalk between SCL and SDA;
2. The impact of reflections from the far termination back towards the display and the Pi;

As you can probably guess, these are not easily quantifiable, however there are some ways to approach this. This assumes a full flooded ground plane under the traces.

Here is a crosstalk calculator that will give an approximate value of the voltage crosstalk between traces - note it is rise time rather than frequency that's the driving factor. Assuming the input capacitance of SDA/SCL on the MCP3008 is 10p and that of the display and PI output are also 10p, and the 0.2mm wide/1oz trace is approx 42p/m, or 5p, there is a total of 45p capacitance on each line and a pull-up resistor of 1.8k on the Pi, this gives a rise time of approx 170nS

Given your traces are approx 5" long spaced 0.1", a rise time of 170nS @ 3.3v will give approx 65mV of crosstalk; this is well within the noise immunity of the SCL/SDA logic.

However, your SCL/SDA lines are effectively a transmission line, operating into an open circuit - the SCL/SDA inputs are very high impedance; the effect of this is to produce ringing on the line. This can be crudely modeled as a lossy transmission line. For a typical 1.6mm FR4 PCB with a 0.2mm trace and a ground plane that's approx, per inch, 62mOhm, 19nH and 1pF. As you can see from the simulation below, there's a lot of ringing on the fast low-going transition. The characteristic impedance of that line is approx 135ohm, so 130 or 150ohm series resistors are a good match as shown in the second trace. While this level of ringing would be unusually bad in real life, I have seen it this bad - I recall having to diagnose a post-production intermittent failure on a very expensive piece of military kit, not of my design. Since the trace itself was buried on layer 3 of 8 the only practical solution was to lift the chip legs and insert a tiny SMD resistor between chip and pad, about 10 times on each board! The post-production team were less than happy, but it saved nearly £300k of rework and late delivery penalties!

 

Thanks for all the tips, it's really appreciated
I should have also mentioned I am using a 4 Layer PCB with one layer dedicated to power and the other to ground, which hopefully will remove a few obstacles.

 

Thanks for all the tips, it's really appreciated
I should have also mentioned I am using a 4 Layer PCB with one layer dedicated to power and the other to ground, which hopefully will remove a few obstacles.

You are unlikely to have problems with signal integrity, just make sure the connections are correct for all devices. A decent scope is your best data device.
For this controller I have the Display and two other devices on the SPI bus. I switch SPI modes and speeds (up to 4MHz) for each type of device on the fly. The 4MHz device on the bus.


Display connector.



Yellow is Display CS, Blueish Display SCK


SCK, SDO
The edge reflections are minor at those speeds because very little energy is stored in the dielectric between signal trace and the ground plane.