oscilator circuit design for use with precision ADC

Thread Starter

johnny411

Joined Mar 3, 2020
31
to start off with i have never used an oscilator outside of using them on microcontrollers, so this is fairly new to me.

i have created a 120Khz oscilator to better synchronize the two adc's together. it is connected to the frequency Control Pin, an input that controls the ADC’s notch frequencies and conversion time.

the ltc2410 is 24-bit with fully differential input

all the digital IO is filtered throught "T" filters to prevent noise-floor degredation and resonance from ground upset. i have also connected the output of the oscilator circuit through one, but i am unsure if it is needed.

my question is whether the circuit would work well, and if there are any flaws in the design. thanks.


adc circuit for post final.PNG
 

nsaspook

Joined Aug 27, 2009
7,594
How fast is the SPI clock? Those filters on the digital lines will seriously affect signal integrity above a few 10's of kHz.
 

Thread Starter

johnny411

Joined Mar 3, 2020
31
How fast is the SPI clock? Those filters on the digital lines will seriously affect signal integrity above a few 10's of kHz.
Hm interesting thought. i considered that but figured it probably wasnt an issue at this speed range.

the ADC samples at 7.5 samples per sercond. however i am using two to increase that to 15 samples per second. the stream of bits is 32 bits in length per sample.

i believe its calculated as this:

32bits x 15 = 480 bits/ second. so 480hZ (a bit more in practice i suspect) ? i believe thats how its calculated. should i change my filters in any way? i cannot simply remove them as doing that would ruin my accuracy.

here is the timing information from the datasheet:
timing characteristics.PNG

output data format.PNG
 

Papabravo

Joined Feb 24, 2006
14,424
How come the ADC and the generator of the SPI signals apparently share a common ground? There is your recipe for disaster in this design, assuming you can move a 480 kHz clock through the RC networks. I'd be surprised if you could get 15 good bits out.
 

nsaspook

Joined Aug 27, 2009
7,594
Hm interesting thought. i considered that but figured it probably wasnt an issue at this speed range.

the ADC samples at 7.5 samples per sercond. however i am using two to increase that to 15 samples per second. the stream of bits is 32 bits in length per sample.

i believe its calculated as this:

32bits x 15 = 480 bits/ second. so 480hZ (a bit more in practice i suspect) ? i believe thats how its calculated. should i change my filters in any way? i cannot simply remove them as doing that would ruin my accuracy.

here is the timing information from the datasheet:
I generally run the external SPI clock at a high speed (MHz range) in minimize data acquisition time from the ADC result buffer to controller to optimize the signal processing time between samples. If you don't overlap digital I/O (digital edges that could upset measure accuracy only happen during this time frame) with the sample/hold and conversion window the effects of digital I/O transfer noise are minimal. I didn't look at the datasheet specifications in detail but usually small value series resistors in the range of 50 to 100 ohms are used to minimize reflections instead of filtering edges to a very slow rate for transfers during actual conversions. It seems from what you posted of the datasheet you could monitor the SDO pin with CS low from the ADC for the conversion status and then start the SPI transfer if that pin goes low at conversion complete.
 
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Thread Starter

johnny411

Joined Mar 3, 2020
31
How come the ADC and the generator of the SPI signals apparently share a common ground? There is your recipe for disaster in this design, assuming you can move a 480 kHz clock through the RC networks. I'd be surprised if you could get 15 good bits out.
star grounding and 4 layer design (no traces on ground plane, most power rails also kept inside layer). they do share a common ground but the analog side and digital side are only joined at one place "star". there are also a total of 5 rails. a +6.5v, -6.5v, digital +5v, 2.5v refrence. also wouldnt it be 480Hz? or am i misunderstanding?

i know they should then be labeled agnd and dgnd to be clearer but since im not really releasing the schematic its good enoughph for me to understand.

would star grounding methods not be good enoughph? i dont know how i could isolate it further without opto isolators and seperate power supplies (if i must i will though, as im paying quite a bit in components and want the result to be accurate)

here is a picture of my pcb layout so far. the gnd layer is not shown, it has components on both sides, the analog side layout is nearing completion but the digital components i just threw on so u could see them. the big yellow line is the gnd seperation area. the relay drivers are on the other ground side but wont be connected there, ill run a trace there from Dgnd side. also manny components arent even on it yet.

full pcb unfinished.PNG


also @nsaspook ok ill look into that and comment back with my findings/ questions. on the datasheet the development board uses 74HC14 i believe to keep noise out. would that work or am i misuderstanding their use case?
 

nsaspook

Joined Aug 27, 2009
7,594
also @nsaspook ok ill look into that and comment back with my findings/ questions. on the datasheet the development board uses 74HC14 i believe to keep noise out. would that work or am i misuderstanding their use case?
I just took a look. Yes, they are using the 74HC14 Schmitt-trigger to regenerate clean edges at the device to minimize signal reflections at the ADC pins for controller signals. The demo software also looks a the conversion complete signal with a 2MHz SCK for 4MHz cpu clock.
CONVEND LDAA PORTD Retrieve the contents of port D
ANDA #%00000100 Look at bit 2
* Bit 2 = Hi; the LTC2410’s conversion is not
* complete
* Bit 2 = Lo; the LTC2410’s conversion is complete
BNE CONVEND Branch to the loop’s beginning while bit 2 remains
high
 

Papabravo

Joined Feb 24, 2006
14,424
I thought you meant 480 kHz. I read your original post to fast. Nothing says you have to do data transfer at the slowest possible speed. As has already been pointed out you want to move the data when you're not doing a conversion and as quickly as possible.
 

Thread Starter

johnny411

Joined Mar 3, 2020
31
I thought you meant 480 kHz. I read your original post to fast. Nothing says you have to do data transfer at the slowest possible speed. As has already been pointed out you want to move the data when you're not doing a conversion and as quickly as possible.
ok. thanks. i am a student still so much of this stuff is very new to me still. so i should use a clock speed in the Mhz range. running it in the mhz range would mean the data would get sent to the microcontroller faster thus it has more time to process it, correct?

i also removed the filter as it would have issues with this. i replaced them with two 74hc14. i have no idea where they will fit on the board but ill make them work, probably on bottom.

also i have decided to split the +5v digital rail into two seperate regulators (A+5v, D+5v) to even further prevent any chance of noise.

if there is anything else i should consider in the circuit below please let me know. thanks.

thanks for all the input, but my original question remains of whether the oscilator circuit below would work, or if there would be issues.

revised analog frontend 74hc.PNG
 

Papabravo

Joined Feb 24, 2006
14,424
The 74HC14 has six inverters in a package. If you don't need all six of them, look for something like a single inverter in a SOT-23 package
 

Thread Starter

johnny411

Joined Mar 3, 2020
31
The 74HC14 has six inverters in a package. If you don't need all six of them, look for something like a single inverter in a SOT-23 package
i actually need 2 per line, so for 2 ADCs it would be 6x2=12. so that works out to 2 chips. i managed to fit them on the bottom no problem. should be easy enoughph to solder (reflow). thanks for the tip though.
 

kubeek

Joined Sep 20, 2005
5,733
How many bits of resolution do you need to achieve?
I dont see what you are actually measuring and what is what on that pcb, but you should have all the connectors on one edge of the pcb.
See this site fora good amount of emc tips and do´s and dont´s https://learnemc.com/emc-tutorials
 

Thread Starter

johnny411

Joined Mar 3, 2020
31
How many bits of resolution do you need to achieve?
I dont see what you are actually measuring and what is what on that pcb, but you should have all the connectors on one edge of the pcb.
See this site fora good amount of emc tips and do´s and dont´s https://learnemc.com/emc-tutorials

there are 4 connectors and 3 sets of leds and buttons. i cannot physically put all the connectors on one side of the pcb. its already double sided 4 layer and im still running out of room.

the connectors are 2x shielded safety bannana jacks, 1x usb (fully isolated), 1x 9v barrel jack for charging 2s lipo.

the application is a very precise current sensing instrument (range of 1nA to 900mA)

im hoping to get as high of an accuracy as possible. im not even using a multiplexer to switch between the two differential resistor values, instead using 2 (rather expensive 10$/apiece) reed relays. i dont have a specific number other than as good as i possible can hope to achieve. ultimatly im aiming for 22-24 usable bits.

ill read through some of that stuff but i think my circuit should be analog and digital isolated enoughph i believe. seperate voltage rails and grounds, only shared at "star" point. everything is also filtered, and all regulators have very low esr output (and input) caps.

all the analog amps, refrences, and adcs live underneath a rf can to prevent noise but mostly to try to get a stable temperature. (i think you can make out the can on top)

underneeth are 4 74HC14 chips to filter all inputs and outputs to the digital side (powered by A+5v, while the micro powered by D+5v)

here is my close to final layout. i hate the differential pairs on the 2 shunt resistors so those might change, and i still need to implement the oscilator.

analog frontend unfinished 2.PNG
 

nsaspook

Joined Aug 27, 2009
7,594
i actually need 2 per line, so for 2 ADCs it would be 6x2=12. so that works out to 2 chips. i managed to fit them on the bottom no problem. should be easy enoughph to solder (reflow). thanks for the tip though.
IMO you don't need (it won't hurt either) them for 2 MHz spi on that small board if the controller is resident on the same PCB as the traces are a tiny fraction of the signal electrical length. The demo board design has a Wire-to-Board DB-9 connector for a digital I/O cable that could be just about any length so it's wise to buffer signals in that case.
 

kubeek

Joined Sep 20, 2005
5,733
I am not sure how big those relays actually are, but make sure you have enough space between them to put in a soldering iron.
 

Thread Starter

johnny411

Joined Mar 3, 2020
31
I am not sure how big those relays actually are, but make sure you have enough space between them to put in a soldering iron.
i am planning on reflowing them with a hot air gun and solder paste.

also @nsaspook 10 of them are only like 3$ so even if they only provide a tiny advantage, ill take it. also since im now doing a split 5v rail, (now there are 7 rails, +6.5v, -6.5v, +3.3v (sd), +3.3v (bluetooth), +5v digital, +5v analog. +2.5v refrence. its battery powered hence the two 3.3v rails as the bluetooth or sd card functions wont always need to b powered. i really want to get as much performance as possible so even a tiny noise improvement is something ill take. thanks for the insight tho.

also is my oscilator circuit going to be good enoughph for this application?
 
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Thread Starter

johnny411

Joined Mar 3, 2020
31
Just be prepared for the DSP needed to cleanup and provide a usable signal even if the ADC and your circuit runs totally to specifications.
https://forum.allaboutcircuits.com/threads/super-moon-shine.100322/post-898360

yeah. its gonna be a process. ive learned quite a bit designing and simulating this project, so im sure that will be another learning process too. its gonna be quite a complex software challenge i suspect since it has to read the current value, then predict where the values gonna go to preventitivly set the programmable gain, and to switch between nA and mA/uA ranges because if lots of mA start flowing through the nA shunt it will fry. (nA shunt is 10K). i also plan to have bluetooth functionality (im sure that you could make out the module in one of the posts of the PCB design here)

thanks. cool project btw.

also is my oscilator circuit going to be good enoughph for this application?
 

nsaspook

Joined Aug 27, 2009
7,594
I normally use a MEMS/crystal clock module for most circuits today. You circuit should work but I don't see much advantage over the ADC internal clock unless you want a nonstandard notch frequency.
 

Thread Starter

johnny411

Joined Mar 3, 2020
31
I normally use a MEMS/crystal clock module for most circuits today. You circuit should work but I don't see much advantage over the ADC internal clock unless you want a nonstandard notch frequency.
it is my understanding from the datasheet that to opperate two adc's at the same time an external frequency is required. i have no such special requirement, as filtering done prior to this takes care of any noise (or should).

im using only 2 ADC's

crystals will come in predone clock modules? ill look into that then.

the microcontroller could either be put into 15Hz sampling rate or simultaneous sampling mode depending on whether i want more accuracy or sampling speed.

datasheet, section begins on page 34: https://www.analog.com/media/en/technical-documentation/data-sheets/2410fa.pdf

datasheet a.PNG

here is the example of 30 Hz sampling (mine will be 15Hz if that mode is selected)

datasheet b.PNG

edit: looks like the MEMS oscilators require 3.3v and not 5v, so ill have to add another voltage rail of 3.3v to the analog side. i might just do that.

here is one i think will work. its 250Khz. click me i dare you to see it.

crystal circuit.PNG
 
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