Op-amp oscillates with gain in feedback.

Discussion in 'General Electronics Chat' started by RichardO, Oct 16, 2017.

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  1. RichardO

    Thread Starter Late Member

    May 4, 2013
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    I am at a loss finding away to make this circuit stable. The output current has to be adjustable using a pot connected to ground.

    I don't mind some reduction in bandwidth. I will just use a faster op-amp and transistors if I have to.

    Thanks for any help.

    AAC_I2I.png
     
  2. MrChips

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    Oct 2, 2009
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    You want negative feedback, not positive feedback.
     
  3. OBW0549

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    Mar 2, 2015
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    He's got negative feedback. Walk the U2/Q1 loop and note polarities: if U2 output goes positive, Q1 conducts less and its collector goes negative. Q1's collector (and the + input of U2) goes negative, and U2's output goes back negative. Ergo, negative feedback.

    What I would suggest for stabilizing this thing is to insert a resistor (≈1-10 kΩ or so) in between the input voltage and the (-) input of U2, and a small capacitor (≈100 pF or so) from U2's (-) input and its output. It may take some fiddling with the RC values to get adequate stability while not slowing down the response too much, but it should do the trick.
     
  4. RichardO

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    It only looks like positive feedback. The transistor adds inversion. The transistor has much more bandwidth than the op-amp so that, by itself, should not be the problem.

    Unless you mean I need to get the phase shift back to less than 360 degrees...
     
  5. MrChips

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    Oct 2, 2009
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    You're right. Sorry, I didn't look at the circuit more carefully.
     
  6. RichardO

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    I have tried a few values with no joy. The best result is with I have found so far is 100 ohms an 10nF (!). The result is not ideal. For one thing it leaves a nasty 1/2 microsecond overshoot and an even nastier glitch at the other edge of the input that is over 10 times the amplitude of the stable voltage.

    My gut feel from what I am seeing is that your idea, although it seems reasonable, does not work. I will look at more combinations and get back to you.
     
  7. crutschow

    Expert

    Mar 14, 2008
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    What exactly are you trying to achieve with this circuit?
    Are you trying to do some type of constant-current circuit?
     
  8. OBW0549

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    Dangit. I just HATE it when that happens... :(
     
  9. RichardO

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    This is part of a circuit to charge a timing cap in about 5ns. It is used to make the triangle in my 100 MHz function generator project.
     
  10. RichardO

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    The idea seemed so promising. I thought I had done something similar in another circuit but did not think to try it here.

    I am still working on it...
     
  11. OBW0549

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    Have you done a .AC analysis on this circuit yet? If so, did it give any clues?

    Also, have you built this circuit yet, and if so, did it oscillate like in the LTSpice simulation? I ask because I've had a couple of times over the years when Spice indicated a serious problem with a circuit, but when built it worked just fine. Not all Spice component models are good; some are screwed up.
     
  12. tindel

    Well-Known Member

    Sep 16, 2012
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    Richard - break the loop and measure the stability! LTSpice has a couple of examples of how to do this in their ../examples/educational folder. You know your opamp gain (GBW), and you know your transistor gain (thereabouts - look at the datasheet) That's your plant gain (alpha). Use your feedback loop to compensate for poles and zeros as appropriate. AC loop analysis is key for knowing what to do in these situations. But you absolutely must know your plant to be able to compensate. I'll try to make it to the meeting tomorrow night to return the favor for all of the questions I've asked you over the years! I actually did a very similar circuit in a product a while back and it worked great.
     
  13. tindel

    Well-Known Member

    Sep 16, 2012
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    I couldn't help but start playing with this thing. What does the bandwidth of this circuit need to be to get your 100MHz clock? 1GHz? Man that's some crazy fast stuff.
     
  14. OBW0549

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    Well, I think I've managed to tame this little critter.

    Aside from dominant-pole compensation (e.g., my post #3 above), there's another technique for calming op amp circuits down: increasing the noise gain (see here and here for discussions on noise gain and its role in loop stability). "Increasing the noise gain" amounts to "attenuating the feedback," and so the fix is really simple: insert a resistor across the (+) and (-) inputs of the op amp. I found 500Ω to give good results.

    The Spice package I use (IntuSoft's ICAPS4/RX) doesn't have a model for the LT1678, so I simulated the circuit with an LT1122 instead; so you may find that with the LT1678 a different resistor value is appropriate.

    Hope this does the trick...
     
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  15. MrAl

    AAC Fanatic!

    Jun 17, 2014
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    Hi,

    You've got the classic PNP output stage that is known to be harder to stabilize. That's why some low dropout voltage regulators need certain value caps on the output.

    The way to stabilize a system is to do an analysis of the circuit with the assumed gain and since the gain can vary (transistors) it is often a matter of doing a root locus which tells what gains are allowed before oscillation will occur.

    An example is shown in the attachment. The jw axis is marked in red for clarity.
    The green lines are locus of roots as the chosen gain factor K is varied from 0 to some max. The white dots are the points hwere the factor K is zero and the locus emanates out from there toward the end of the green lines.
    Noteworthy is where the green lines cross over the jw axis, which is to the far right where we see two 'arms' that cross over. Whatever value K takes on for that portion is not allowed because that means the circuit oscillates. When to the left of the red line, it does not oscillate although it may take a long time to settle anyway which can sometimes be called unstable also, so we dont want to be too close to the red line either.

    In order to do a study like this with an op amp though you need to know the model of the op amp pretty well because that will be part of the equation that describes the system. You'd have to look into that.

    Without doing that work, the main thing to be said about this circuit is that the extra gain of the transistors is causing the gain of the circuit (and hence that value of K) to go higher than the op amp is already compensated for, assuming it is compensated. As the gain goes higher the root locus crosses over the jw axis (red line) and the circuit oscillates.
    One way to combat this is to simply reduce the gain which could be as easy as increasing the base resistors on the transistors to a higher value. That brings the max value of K down to a value that does not allow the locus to cross the jw axis.
    Another way is to change the response of the op amp by adding components that form an actual integrator rather than depending on the slew rate to make it 'look' like an integrator (this is a compensation network). The values would have to be chosen carefully in order to maintain the required speed.

    An alternate method and always much more stable is to use NPN transistors instead of PNP. That makes the circuit simpler and allows for some simpler compensation. The drawback is there is a voltage drop of around 0.7v to 1.0v from the Vcc line so with 7v Vcc the max out might be around 6v but you might be able to increase Vcc to make up for it. If you need current sensing then you need some kind of sense resistor too though, im not entirely sure what you are trying to accomplish here yet.
    The reason NPN transistors are easier to work with is because the voltage gain of a voltage follower is 1 or slightly less, so even though you get a ton of current gain you get no voltage gain so the circuit often remains stable.

    As a final note, when you go to the actual physical board layout you may run into problems there even though the simulation works and that is of course because of parasitic elements of the circuit which are not present in the simulation. That can be hard to deal with too. Unwanted feedback can cause problems also, so it's a good idea to keep element impedances as low as possible in any circuit you decide to use.
     
    Last edited: Oct 17, 2017
  16. DickCappels

    Moderator

    Aug 21, 2008
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    Just go with increasing the noise gain as OBW5409 suggested in post #14.

    It is nearly fool-proof and has a very high success rate.

    If you find that the lower open loop gain is affecting DC accuracy you can install a capacitor in series with the shunting resistor (500 ohms in the given example). Use C = 1/(2 Pi R F) to find the capacitor necessary to have the gain reduction kick in at your desired frequency.
     
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  17. RichardO

    Thread Starter Late Member

    May 4, 2013
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    No, I have done the .AC analysis. :oops:

    I keep meaning to test the circuit on a solderless breadboard but other things always seem to come up. I was in the process of laying out a proto PCB when I noticed a wrong resistor value. That led to my noticing the instability situation with increasing gain.

    I always assume that Spice is much more likely to miss a problem than to report one that does not exist. I have seen some really weird things in Spice, however.
     
  18. RichardO

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    May 4, 2013
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    I am hoping that the current source bandwidth will be at least 10 MHz. I will settle for 1 MHz.

    The initial goal is to generate a clean 100 MHz triangle wave. Then it is a simple matter to shape that into a sine wave using a nonlinear circuit. :D

    No 1 GHz clock but lots of bandwidth none the less.

    1 GHz? No problem. I accidentally did that. :eek: Fortunately, I know why it happened and how to fix it.
     
  19. kubeek

    Expert

    Sep 20, 2005
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    That is a really bad idea. Solderless breadboards are about the worst thing you could use for any fast circuit. Ideal would be dead-bug style wiring on a solid copper plane, or at least a prototype board with square pads.
     
  20. RichardO

    Thread Starter Late Member

    May 4, 2013
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    Thanks a lot for the information. This is not something I do lot of so anything helps. I will take some study on my part.

    Unfortunately, the 5K pot is pretty much a given. If it gives further problems I will be forced to reconsider my circuits topology.
     
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