NMOS - NPN current limiter circuit

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ssetiawan

Joined Nov 23, 2020
9
Below is the simulation for the PNP, P-MOSFET circuit:

Note that the capacitor charges to the full 9V (green trace), not to about 7.5V as the NPN, N-MOSFET circuit does.

Also note the PNP emitter-base voltage during the charge (red trace).
For a 50k bias resistor, the emitter-base voltage at the current control point is about 600mV.

The PNP controls the P-MOSFET gate-source voltage (blue trace) to maintain the 30mA current limit (yellow trace) during the capacitor charge.

View attachment 264404
I understand them now then! thank you so so much for the great explanation to all of you! I guess I still need to learn more about semiconductors to be better at it :)

cheers!

/SS
 
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