CD4060 is a 14-bit counter.
Q14 = 16384
Q13 = 8192
Q12 = 4096

TS asked for 30 to 35 minutes.
34 minutes = 2040 seconds.

Use a 0.5Hz clock and gate the 1-sec high pulse with Q12 (or is it Q13, I still have to check the math).
Use the trailing edge of the gated pulse to reset the CD4060.

 

Guys,

Thank you all very much for the help.
I will try to go with the CD4060 as suggested.

I will post the circuit here for review.

Thanks

 

One thing I noticed with the CD4060 is that it does not have an output from the first stage.

You only need a 555-timer to generate the output pulse. No gating or RESET is required.
You can set the CD4060 RC clock to 8Hz and use the Q14 output to trigger a 555-timer 1-second output.

If you trigger on the first rising edge of Q14, the first pulse will be generated at half the time delay from RESET (i.e about 15 minutes), followed by 30-minute intervals.

If you trigger on the trailing edge of Q14 then the pulse will be generated at 30-minuted intervals.

If you want the counter to reset on power-on you should add an RC power-on reset circuit on the RESET pin.

If you need 200mA output then use NE555 or LM555 chip, not a CMOS version.

 

Why is that?

Assmue that the 4060 oscillator frequency is such that the Q14 output has a 30-ish minute cycle time. For example, if the osc freq is 0.125 Hz, then Q14 cycles every 2048 seconds, or 34 minutes and 8 seconds. In this way, the 4060 produces the desired delay between outputs without a decoded reset state. Unfortunately, at this frequency the 4060 does not have the outputs needed to decode a 1 second pulse.

For the first 17 minutes, Q14 is low. Then it goes high and is differentiated into the gate of a 2N7000 MOSFET. The drain goes low for 1 second (the differentiator time constant). Then it's another 35 minutes before Q14 goes high again.

If the output transistor is changed to a p-channel type, the first output pulse will be after the full 35 minutes. Also, the drain will be pulling up to Vdd rather than down to GND.

ak

 

Thanks again guys.
I have made this simulation and it seems to work.
(In the real application I will connect M3 base to Q13 or Q14 - I need to do the exact math for 30-35 minutes)

Also attached is the simulation for reference.

 

I was thinking of an R-C differentiator between the 4060 and the output circuit to form a pulse from the Q14 edge, with the 4060 free-running (no resets). But an R-C integrator as a delay generator to the Reset input achieves the same thing - IF the 4060 is running at 1/2 the speed.

I think this is the first indication that you needed a *negative*-going output pulse. For a simple pulse, you can eliminate M1 and M2, and have M3 pull the output low (with a pull up resistor to the +24 V). Your circuit looks like you are creating a timed interruption of a power source. Yes / No - ?

The 4060 does not have tri-state outputs, so you can delete R4.

ak

 

If you trigger on the trailing edge of Q14 then the pulse will be generated at 30-minuted intervals.

Okay, I see that you need to trigger on the trailing edge if the counter is not reset at the timeout.

 

Okay, I see that you need to trigger on the trailing edge if the counter is not reset at the timeout.

Or maybe not. You can trigger on the Q14 positive edge with no Reset connection if it's ok that the first cycle is 15 minutes, and then all subsequent cycles are 30 minutes.
ak

 

A long-time frustration with the CD4060 is that for delay circuits such as this, there is no initial pulse when power is applied. Usually, the first delayed output pulse is after a full cycle. So unless you have an LED driven by one of the upstream outputs, blinking once every few seconds, you have no idea if the circuit is working until after 30 minutes. Of course there is a way around this, but it needs 1 R, 1 C, and 1 inverter or transistor. Depending on the application, you might need a transistor as an output driver and can piggy-back on that.

ak

 

I was thinking of an R-C differentiator between the 4060 and the output circuit to form a pulse from the Q14 edge, with the 4060 free-running (no resets). But an R-C integrator as a delay generator to the Reset input achieves the same thing - IF the 4060 is running at 1/2 the speed.

I think this is the first indication that you needed a *negative*-going output pulse. For a simple pulse, you can eliminate M1 and M2, and have M3 pull the output low (with a pull up resistor to the +24 V). Your circuit looks like you are creating a timed interruption of a power source. Yes / No - ?

The 4060 does not have tri-state outputs, so you can delete R4.

ak

Sorry for not mentioning that earlier.
M1, M2, D1 and the resistors (basically everything to the right of M3) is an existing circuit the feeds power to a charger.
The addition of the counter will reset the charger every 30 minutes by eliminating the power source to it.
This is done since the charger may get into a fault state and will only come out of it when reset.
Resistor R8 is just for the simulation, there is an entire circuit instead o it.

Thanks for the comment of R4 - I will remove it.

 

So unless you have an LED driven by one of the upstream outputs, blinking once every few seconds, you have no idea if the circuit is working until after 30 minutes.

That circuit I referenced has two LEDs just for that purpose.

 

This is based on a power interrupter for a slot car system I posted in 2016, updated for this application. I threw in D1 and D2 because they are cheap indicators of function.

In a 12 V circuit, C3 can charge-pump the Q1 gate voltage above 20 V. D3 is added to discharge C3 while keeping the Q1 gate below 20 V. The caps are 3.3 uF ceramics because I have a bunch of them, and they behave better than aluminum electrolytics in an oscillator circuit where the cap voltage reverses.

R1-C1 sets the delay between off periods.
R3-C3 sets the power-off time.
D1 lets you know the circuit is running.
D2 lets you know when the output power is off. R4 and R5 are sized for 5 mA LED current. If the LED is deleted, the resistor values can be increased.

ak